AMD Takes Opteron To 2.4GHz

EconolineCrush writes "AMD has added a series of Opteron x50 processors to its workstation and server line that push the K8 core up to 2.4GHz. The Tech Report has tested the latest single and dual-processor Opterons against more than 20 other processors, including exotic Pentim 4 Extreme Edition chips, affordable Athlon 64s, and everything in between. Even if you have no interest in AMD's latest workstation chips, the review is worth checking out to see how two dozen of the fastest workstation and PC processors stack up in rendering, scientific computing, speech recognition, and even gaming tests."

Comments

2.4ghz?

[p00p at instable.net]

So what is that, 4000+?

Re:2.4ghz?

[Robmonster]

Parent got modded funny....?

I think the post is about right, and judging from some later posters Sisandra rated it around 3900+

RM

Re:2.4ghz?

[stephenisu]

Well, they didn't want all the case modders out there who use bad EM shielding to know that that is what is screwing up thier cordless phone.

Re:2.4ghz?

[Skater]

Prepare for ... ludicrous speed!

--RJ

Re:2.4ghz?

[irokitt]

Phhhht. My processor went plaid years ago.

Re:2.4ghz?

[Anonymous Coward]

So wait until they bring the beasts out next year that are duel core. Those are going to fly. Mmmmm Quad box at home....

The Conclusion...

[Mz6]

From the article to save everyone the 16 pages of boring charts and graphs.. Conclusions "If I were building (or, implausibly perhaps, buying) my ultimate workstation right now, I'd want a pair of Opteron 250s beating at the heart of it. The benchmarks speak volumes. For single-processor systems, the Opteron 150 looks like the fastest x86 CPU on the planet. In a multiprocessor configuration, the Opteron 250 scales up very well, even without the benefit of an optimal memory configuration, a NUMA-aware OS, or 64-bit extensions. By contrast, Intel's dual Xeons are a little bit disappointing. They perform relatively well in CPU-bound apps like 3D rendering programs, which are also largely well optimized for SSE2. But in memory-bound applications where dual Xeons ought to do well, like video encoding, the Xeons' slow bus and RAM hold them back. One has to wonder what Intel is hoping to accomplish by saddling its workstation-class processors with older, slower technology. Even a single Pentium 4 benefits greatly from additional bus and memory bandwidth. Surely a pair of Xeons on shared bus ought to have this same advantage. Intel's apparent willingness to forego such enhancements in favor of adding ever-larger on-chip caches to the Xeon is puzzling"

Re:The Conclusion...

[Timesprout]

From the article to save everyone the 16 pages of boring charts and graphs

Thanks for the summary but can I just say I appreciate the level of detail and information provided. Way too many 'benchmarks' these days, especially those dealing with language performance are from some loser with their crappy home PC which they usually dont even know how to configure properly.

Its a relief to see a benchmark from someone competent and aware of the various factors affecting the results obtained.

Re:The Conclusion...

[ishark]

Thanks for the summary. I quickly browsed the article looking at some graphs, and I'm suprised by the bad performance of the Athlon 64s compared to the Athlon XPs in many of the tests.... Is any of those programs running in 64 bit mode, or it's just a test of 32-bit applications running on 64-bit CPUS?

Re:The Conclusion...

[bhtooefr]

BTW, the 150 is a top-locked AFX53 (or, the AFX53 is an unlocked 150). Also, EconolineCrush's comment about the K8 core just now hitting 2.4GHz is wrong - the FX53's been out about a month, I think.

Re:The Conclusion...

[Jeff DeMaagd]

The reason is that a three-drop bus used for Xeon DP (533MHz bus), five-drop for Xeon MP (400MHz bus), can't operate as fast signalling-wise as a point-to-point bus used for Pentium 4 and all Athlon systems, 1 and 2 processor. Terminmation was just too difficult, I think. Before Hypertransport, the wiring for multiprocessing with only a point-to-point bus was rediculously expensive, particularly on the chip that connects the CPUs to the rest of the system.

AMD got a little unconventional and this time it paid off on Opteron. It didn't work so well with the Athlon MP because of this wiring problem, too many wires, too expensive of a core chip, it was 1000+ pins when 600 pins was thought to be expensive.

Re:The Conclusion...

[Uncle_Al]

As far as I could gather, they were running windows XP (normal)...so 32bit it is..

..the dual opterons where also running with the memory only on one of the processors...

Re:The Conclusion...

[Anonymous Coward]

The 64 bit xeons due out within a month or so have 800MHz FSB at last. Still dont have the serious memory bandwidth of real dual opteron boards (as opposed to the one tested here with only memory on one CPU).

I get v. annoyed by all these crappy benchmarks under 32 bit emulation though. Linux gives you 64 bit and NUMA aware for amd64 already... they could at least try it. Much faster in 64 bit mode for many apps in my experience.

AMD are back

[RoderickMcDougall]

They were lagging there for a while but the benchmarks depict a good story. Looks like the opteron is going to be yet another AMD chip that is great for gaming (and most other things). Hopefully a cheaper price than the p4's will really contribute to yet another dominating year for AMD.

Re:AMD are back

[dealsites]

I agree. AMD has some really great products. We always hear about Intel's huge R&D budget. I'm not sure how much of that is alloted to processor design, but it doesn't seem like they've been able to outrun AMD. AMD might not always have the fastest chips at any given moment, but they are always close behind. Since I don't buy bleeding edge equipment due to the high cost premiums, AMD is always a solid choice for me.

--
New deal processing engine online: http://www.dealsites.net/livedeals.html

Re:AMD are back

[Deliveranc3]

AMD processor design is run in conjunction with Sun and Apple and several other companies. Basically they have several sets of labs all trying diffrent things.

Hence, hypertransport + On Chip Memory + efficient design all comming at once as opposed to intels slow and steady approach.

$0.1768 (hey I live in Canada.)

Re:AMD are back

[hrieke]

And that has nothing to do with the fact they AMD hired most of the Alpha design team when DEC stopped do their chip development?

Re:AMD are back

[Gr8Apes]

I think that's an awesome strategic move! AMD had the insight to see that hey, here's a group of highly technical people that have some great ideas, and gee, we can hire them all.

Would rather have had AMD go "hmm, naaah, we don't need to hire guys with really creative and proven ideas, let's go reinvent the wheel"?

Thanks to their insight, hypertransport did not go the way of the dung heap, and superior processors design resulting in better performance, especially in multi-processor machines have resulted that are actually being accepted in the market place. They are also causing the former obvious monopoly to take notice. Note that the P4 will be no more, and the PIII core is coming back. Now that's eating some crow. If not for AMD, how likely would the retirement of the P4 have been in this time frame? I doubt it would have happened, because Intel would not have had to push their processors much and could probably have coasted for another 2 or 3 years with this chip.

2.4 Rates as around PR3900+

[�nertia]

I have been running my Opteron 248 at 2400Mhz. Sisoft seems to equate this to a PR rating of 3900+. I have no idea how it calculates this so please take that with a measure of salt.

Re:2.4 Rates as around PR3900+

[Anonymous Coward]

Sisoft seems to equate this to a PR rating of 3900+

its speed is equivelent to that of an AMD Thunderbird running at 3.9GHz - dont know why AMD rates their processors like that, but thats roughly how it goes

Re:Think it's time to seriously consider AMD

[Anonymous Coward]

I've been a die hard of Intel chips since having been disappointed with earlier versions of AMD processors
yeah, K-6's were godawful excuses for a processor

I don't think it is puzzling at all

[peterdaly]

Intel's apparent willingness to forego such enhancements in favor of adding ever-larger on-chip caches to the Xeon is puzzling"

Why is it puzzling? In their historic "Intel Inside" world, they were basically competing against themselves. Adding a bigger cache is not only easy, but a cheap way to rake in more cash without doing much R&D work.

It's not until recently that AMD has starting "schooling them" on what improvement really means. Just look at how Intel is going to use the AMD x86-64 method in the upcoming Intel 64bit platform. And now "If I were building (or, implausibly perhaps, buying) my ultimate workstation right now, I'd want a pair of Opteron 250s beating at the heart of it. The benchmarks speak volumes. For single-processor systems, the Opteron 150 looks like the fastest x86 CPU on the planet..." And this is at much lower mhz!

I believe Intel had thought they had reached monopoly status, which really they had, and the culture had become complacent. This did not happen at the underdog AMD, who has recently been able to quickly leapfrog Intel's offerings.

-Pete

Re:I don't think it is puzzling at all

[Yartrebo]

Adding a bigger cache is not only easy, but a cheap way to rake in more cash without doing much R&D work.

It's might be easy, but it isn't cheap to add more cache. Cache accounts for something like 50% of the die surface of a modern chip, and a larger die means a lower yield and less chips per wafer.

Re:I don't think it is puzzling at all

[dpilot]

Not necessarily so.

L2 cache is also memory, and any memory of that size will have redundant elements. Therefore, even though it's a lot of area, it's fixable area, and will yield higher than an equivalent area of logic. Plus, though SRAM design may not be 'easy', expanding a cache is one of the easier things you can do to enhance performance.

For some problems, cache will never be big enough, for others it will. Unfortunately for the P4, it's architected as a bandwidth hog, and the core excels at streaming media processing - precisely where a bigger cache tends to fall down.

Re:I don't think it is puzzling at all

[Anonymous Coward]

I believe Intel had thought they had reached monopoly status, which really they had, and the culture had become complacent. This did not happen at the underdog AMD, who has recently been able to quickly leapfrog

AMD has almost always offered better than Intel performance..

Re:I don't think it is puzzling at all

[ivan256]

The sentence before your quoted line there speaks volumes to the issue.

Surely a pair of Xeons on shared bus ought to have this same advantage.

It's way easier to ramp up the bus speed for a single processor, since it only has to interact with one other device. It's considerably harder to increase the speed when there are three devices on the bus instead of only two. Since the Opteron uses point to point connections they don't have this same problem. In that sense it's not really puzzling at all. They probably just can't get it to work.

Re:I don't think it is puzzling at all

[Anonymous Coward]

AMD has almost always offered better than Intel performance..

No, not unless you are talking performance/price.

Re:I don't think it is puzzling at all

[Vaystrem]

"Why is it puzzling? In their historic "Intel Inside" world, they were basically competing against themselves. Adding a bigger cache is not only easy, but a cheap way to rake in more cash without doing much R&D work."

You are forgetting a key deficiency of the P4 "netburst" architecture. Its incredibly long pipeline which makes it very susceptable to cache misses. Therefore the larger the L2 cache the less of a performance hit the processor will take if it misses an instruction or two.

It is possible that adding a bigger cache is 'cheap' but if that were the case we'd see a dramatic reduction in the price of P4EEs as they are getting schooled by AMDs. L2 Cache is not cheap to implement. And significantly adds to the manufacturing cost of the processor.

Additionally the lack of a FSB upgrade on the Xeons is troubling, but that apparantly is coming later this year, and this may reduce the advantage of the Opteron's to SOME degree. However, in the current architecture the Xeon's FSB bandwidth will always be shared - while the Opteron's get dedicated bandwidth for every processor. This is really the most remarkable advantage of 'Hammer' family of AMD CPUs over the Netburst generation of P4s/Xeons.

"I believe Intel had thought they had reached monopoly status, which really they had, and the culture had become complacent. This did not happen at the underdog AMD, who has recently been able to quickly leapfrog Intel's offerings."

Intel put a lot of money and R&D into a product line (P4 NetBurst) and honestly - even with AMD making inroads - they still do not have that large a share of the CPU market. Intel has however observed their lead eroding and have canned Tejas - successor to the Prescott. So Intel is able to step up and make the big changes even when it has sacrificed large amounts of R&D money.

Intel to formally confirm Tejas canned
Intel may have canned Tejas...

Re:I don't think it is puzzling at all

[Anonymous Coward]

Actually, a Pentium M 2.0G running at 2.4 (this is an easy overclock: remember, even at 2.4 you're still only putting out ~28watts so it's easy to cool) is the fastest x86 CPU on the planet for most things (certainly integer/nasty code like compiling/compressing/symbolic mathematics etc)

Re:I don't think it is puzzling at all

[Michael Spencer Jr.]

I hate to sound like I'm being contrary, but I don't really know enough about the subject:

You are forgetting a key deficiency of the P4 "netburst" architecture. Its incredibly long pipeline which makes it very susceptable to cache misses. Therefore the larger the L2 cache the less of a performance hit the processor will take if it misses an instruction or two.

I just finished a Computer Architecture class at the local university. While I'll probably forget 90% of what we learned in that class in another year, I'll ask while it's fresh on my mind:

What does a long pipeline have to do with the cache hit/miss ratio?

We learned about some hypothetical five-stage-pipeline CPU in class, which is childs' play compared to the superpipelined monsters of today. However, if the same concepts still hold, a longer pipeline just increases the stall penalty.

For those who haven't yet had their heads pumped full of Computer Architecture trivia, I'll recap what little I learned in class, so the question makes sense:

A CPU is like a big assembly line. Its job is to read a bunch of instructions and execute them in order as they come down the assembly line. In an ideal world, with a program that never loops and never branches, it works JUST LIKE an assembly line, munching on instruction after instruction.

CPUs operate at a clock speed, and receive a clock pulse at regular intervals. They are supposed to be able to complete whatever work they're working on each clock cycle, so a really simple one-stage CPU would need to have a clock speed slow enough that any instruction can be completed in that length of time.

People figured out that instructions can be split into little pieces, such that these little pieces are each simpler than the whole instruction. That lets them build faster but more complex pipelined CPUs. Each pipeline stage might have some work to work on, but all pipeline stages can work at the same time.

So this means that if the pipeline is full of instructions, and every instruction uses every stage, then the CPU is performing one instruction per clock cycle. This is better than before though: these clock cycles are tiny because they just have to be big enough for these tiny fractions of an instruction. So we get the speed benefit of quick clockcycles, but we're still performing a full instruction each cycle. That's something like a 5x speedup if you have five pipeline stages!

It doesn't always really work this way though. See, instructions can depend on each other, and that causes problems. There can be dependencies like Read-After-Write, where instruction 100 does some math and puts the result in a register, like A, and instruction 101 uses the result (in A) in its own calculation. Normally that would be fine, but a pipelined CPU tries to do things at the same time.

For CPUs as simple as we talked about in class, there are two solutions: stalling and forwarding.

In forwarding, the CPU is smart and looks ahead and figures out "this instruction needs something that the previous instruction is providing", and just short-circuits the whole formal writing and reading process, and just kinda passes the answer under the table between pipeline stages. "Psst, hey M-stage, this is E-stage. I've got the answer to A if you want it..."

In stalling, the CPU realizes it NEEDS the answer to one instruction before it can do the next, so it starts wasting work units. Stages start getting commands saying "do nothing", which wastes CPU cycles. So in the example above, where instruction 101 needs something instruction 100 is still creating...suppose instruction 100 is multiplying two 256-bit floating point numbers together. Instruction 100 is going to take TONS of time to finish, so instruction 101 just gets stuck at the decode pipeline stage, sitting there tapping its feet and executing an "are we there yet" check every clock cycle. The rest of the pipeline goes unused.

For my next trick, I'll tie

Re:I don't think it is puzzling at all

[boots@work]

I think he meant that deeply pipelined machines suffer a worse penalty when they get a cache miss. So it's worth making both L1 and L2 as large and fast as you can. It doesn't directly effect the hit ratio as far as I know.

Re:I don't think it is puzzling at all

[rainman_bc]

Why is it puzzling? In their historic "Intel Inside" world

I think this now serves as a warning instead of a reassurance :)

Intel Inside: Less value for your $$

Way to go AMD! Since the Athlon came out, they sure have come a long way! They've gone from being a budget proc to a real competitor. Wonder where our processors would be without the competition.

Re:Huh? Pentim 4 Extreme

[lucas teh geek]

wtf is a Pentum? :P

Glad to see AMD coming to the party.

[WordODD]

I work for a medium sized school divison and this year happens to be the year when my school will get new equipment. When the meetings about what to buy have occured every single time someone has mentioned getting AMD chips instead of Intel those in managerial positions have been quick to say, " No, AMD chips are slow and run very hot. They wouldn't be a good choice for what we are looking for." Now this insight is coming from people who..

A. Are mainly concerned about the bottom line as far as price goes.
Which makes zero sense being AMD chips are more then competitivly priced compared to Intel.

B. Are supposedly in the know about technology.
Which is obviously not the case as many of them still think AMDs have the same cooling problems they did 5 years ago.
These chips are cheaper now then their Intel conterparts and from my experience run at the same speed if not faster. AMD is finally getting on the ball as far as putting the clock speed measured in Ghz to provide direct comparission which really needed to be done in order to compete. Combined with their dedication to inovation, i.e. the 64 bit processor that Intel has still yet to bring to market make me really suppport what the company is trying to do. I really hope to see more reviews like this that I can pass on to those in charge in hopes of getting away from an Intel only environment.

Just to clarify I do not hate Intel I just think that between the two there Intel does not always win outright and AMD should be considered before any purchases are ever made.

Re:Glad to see AMD coming to the party.

[Deliveranc3]

Well I'm not a senior manager but my philosophy at this point would be something like.

"You will definitly be fired for buying Intel"

But perhaps word just hasn't hit the market yet.

Re:Glad to see AMD coming to the party.

[dave420]

Seeing as most /.ers still say that windows crashes all the time and is rubbish, your point about people speaking out of their asses might go over a few peoples' heads :-P

Re:Glad to see AMD coming to the party.

[Anonymous Coward]

AMD is finally getting on the ball as far as putting the clock speed measured in Ghz to provide direct comparission which really needed to be done in order to compete.

Um. Direct comparison, in GHz? Did you RTFA? If we could compare processors in terms of GHz, why would we be reading through 10 pages of benchmarking graphs? GHz != processing speed, it's just part of the story. AMD are usually lower in GHz and faster to actually run anything.

OK so it has a nice metal cap

[Timesprout]

but where are the 940 pins? I count only 939.

Re:OK so it has a nice metal cap

[mobby_6kl]

did you count like "0, 1, 2,..." ??
The last pin might be #939, but there are(at least should be) 940 total pins.

Re:OK so it has a nice metal cap

[Ianoo]

I know the parent was trying to be funny, but if people are interested, just take a look at the grid on the bottom of the chip in the article:

31 rows * 31 cols = 961

Pins missing at the four corners total 13 (3 at each corner plus an extra keying pin at the bottom right). There are 4 'gaps' of 2 pins missing within the grid itself. This means:

961 - 13 - 8 = 940 pins

Re:OK so it has a nice metal cap

[irokitt]

Your geek pass is hereby revoked. You forgot to start counting at zero!

Re:OK so it has a nice metal cap

[Junta]

No, just the opposite, he *was* counting from zero, hence the 939... Counting from 1 instead of zero as an error would give too high a number.

Ho Hum

[A. Pizmo Clam]

Another day, another coat of more-Gigahertz paint slapped on the crude and aging x86 architecture. Open Source OS's like Linux have allowed us to finally take advantage of the bleeding-edge software technology of the 70's, yet the Intel/AMD duopoly keeps us stuck in even more primitive waters for hardware.

Perhaps, if Microsoft's software monopoly ever gets seriously challenged, we'll finally have a chance to take this register-starved, CISC-mired turkey out back and give it a proper burial.

Re:Ho Hum

[digitalunity]

I'm sorry, but you do not truly understand how modern x86 chips work. You don't like them because they are 'CISC-mired'? The funny thing is, underneath they really aren't CISC. They are RISC to the bone. Each and every x86 instruction you feed a modern processor is deconstructed into many smaller RISC-like ops and they are processed independantly. Small register set you say? You don't get to address them directly, but both the Athlon and the P4 have had many more registers than the x86 ISA would lead one to believe for a really long time. The x86-64 is nice because now you get many more registers of larger size, directly addressable.

In a purely dollar/performance comparison, nothing beats x86.

Re:Ho Hum

[10Ghz]

And still, that "technology of the 70's" is the fastest thing there is. Sure, you might have some CPU's that are even faster, but they are also alot more expensive. Those CPU's usually get better performance by adding lots and lots of cache to the CPU.

If PowerPC (for example) is SOOOO much better, why doesn't it wipe the floor with x86? Sure, it's competetive, but it does not annihilate x86

As to being register-starved... Again, that doesn't seem to hurt the performance of these chips that much. And if you use Opteron/Athlon64 with an 64bit OS, you get double the number of GP/SSE-registers (instead of 8, you get 16).

As to CISC... Modern x86-CPU's are very much RISCue in the inside. And being RISC does not automatically mean that it's somehow better. You can have kick-ass CISC-CPU's, and you can have crappy RISC-CPU's.

Re:Ho Hum

[brap999]

Seeing as how Linux runs on just about every popular chip out there, your comment has no basis behind it. As a matter of fact, we can thank Windows for our dependancy on the x86 architecture, as it is the only platform it CURRENTLY runs on, until they finally release the 64bit version. You are an idiot who has only been first once in your life, in the shit for brains line. I do feel sorry for you however, it must be difficult living life with an IQ of 12 and a hockey helmet on head.

Re:Ho Hum

[dave420]

Why on earth does everyone blame everything on microsoft?? I'm all for some ragging if it's even plausible, but the amount of anti-microsoft tripe spewed out on this forum is just ridiculous. You used to be able to surf through it, but now everyone's blaming microsoft for global warming, outsourcing to india, Bush, Kerry, Nader, and the near-extinction of the giant panda.

You admitted it yourself - it's AMD/Intels fault. They make the chips. Blame them. Microsoft are as much to blame as Linus is in this one. No amount of fanboy paranoid fascism is gonna change that :-P

Re:Ho Hum

[_|()|\|]

take this register-starved, CISC-mired turkey out back and give it a proper burial

This aging architecture has maintained an incredible price/performance ratio. At this price level, the only thing that compares is the G5. A comparable UltraSPARC, Itanium, POWER, or PA-RISC system will cost much more.

As for registers, AMD64 doubled the number of general-purpose registers, which are already subject to register renaming.

Re:Ho Hum

[Jeff DeMaagd]

x86-64 only doubles the number of registers.

Something tells me if the billions of dollars per year in R&D were spent on a fully-RISC system, externally and internally, it would be much faster, saving a stage or two of decoding and other internal mangagement, saving a lot of design and testing hassles.

For over half a decade, DEC held its own against Intel with $70M / year CPU development budget, when Intel was spending $2B. They only got tripped up with poor marketing and problems and delays in fabbing the EV6 and EV7.

For one, being fully RISC made it far easier to validate the chip design because it didn't involve lots of work disassembling instructions and keeping track of the results, predicting properly and so on.

Re:Ho Hum

[cosmo7]

As to being register-starved... Again, that doesn't seem to hurt the performance of these chips that much.

I am pretty sure that in any modern x86 design the actual operation of the processor's registers is virtualized and accessing them is no faster or slower than accessing cached stack memory.

Re:Ho Hum

[Short Circuit]

Since Microsoft has been the dominant OS vendor for a long time, people have written their software for Microsoft products. And since the cheapest Microsoft solution was on PCs, people wrote their code for Wintel systems.

Since the software was compiled to architecture-native code, it wasn't easily runnable on other architectures. As a result, even as Microsoft products were available for Alpha, third-party applications weren't. So people stuck with x86, 'cause that's where the software was.

And the reason the PC architecture was cheap? IBM built it that way. They liked the 8086, but it was too expensive to implement (16 bit data bus) ... So Intel provided them with the 8088, which was cheaper (16 bits internal data, 8 bit external data bus. 20 bit adress bus.).

I don't know if the PowerPC architecture was available at the time.

Re:Ho Hum

[Anonymous Coward]

> x86-64 only doubles the number of registers.

Yes, and modern compilers make quite good use of what they have. Why build/buy more when the returns diminish so rapidly?

> Something tells me if the billions of dollars per year in R&D were spent on a fully-RISC system, externally and internally, it would be much faster, saving a stage or two of decoding and other internal mangagement, saving a lot of design and testing hassles.

RISC requires higher memory bandwidth, and more memory, to hold the small function instructions. Modern "CISC" cpus are RISC inside - they load a small "powerful" instruction and execute multiple RISC instructions within themselves - without loading all those instruction words over the memory bus.

> For over half a decade, DEC held its own against Intel with $70M / year CPU development budget, when Intel was spending $2B. They only got tripped up with poor marketing and problems and delays in fabbing the EV6 and EV7.

DEC had a radically different cultural ethic than Intel. While modern American Corporate Management would like to delude themselves otherwise, poor corporate ethics drive costs higher in many ways.

> For one, being fully RISC made it far easier to validate the chip design because it didn't involve lots of work disassembling instructions and keeping track of the results, predicting properly and so on.

These days CPUs are basic software design. Build and test a risk core. Then, build and test an interpreter. Layers my boy, layers. A technique as old, and testable, as the hills.

Re:Ho Hum

[Anonymous Coward]

Nice troll...

Modern "x86" chips have a very advanced RISC-like architecture, x86 is only the instruction set - nothing more.

It takes a little bit of extra circuitry to translate the x86 ops instead of using a brand new ISA, but it's well worth it for the backward compatibilty IMHO.

Re:Ho Hum

[Anonymous Coward]

Doubles the number of registers visible to the compiler! The actual hardware has many more physical registers (look up "register renaming").

While it's true that you could save a couple of pipeline stages by going to a new ISA there are also problems:

* When the ISA is no longer abstracted from the physical architecture you can't make code compatible chips with different internal architechures (P4 vs. AthlonXP).

* You would need to either recompile *everything* or use slow software emulation to run old apps. This is not a problem if you only use OSS, but what about all those old games and windows?

* x86 code is actually very compact thanks to it's variable opcode size. This means code takes up less memory and cache space, and less bandwidth.

* If you simplify the hardware you need to the compilers better at optimizing code for each specific processor.

Re:Ho Hum

[haggar]

I am neither a PPC or a x86 pundit (microcontrollers here), but as I understand it, the PPC has much more registers than the x86, and this, in my experience, does give a speed advantage.

Re:Ho Hum

[fmorgan]

This isn't a valid argument "If PowerPC (for example) is SOOOO much better, why doesn't it wipe the floor with x86? Sure, it's competetive, but it does not annihilate x86
". Unfortunately, the best tech solution doesn't always win.

Otherwise a pseudo-OS from a company I won't name wouldn't have conquered monopoly status....

Re:Ho Hum

[10Ghz]

This isn't a valid argument "If PowerPC (for example) is SOOOO much better, why doesn't it wipe the floor with x86? Sure, it's competetive, but it does not annihilate x86
". Unfortunately, the best tech solution doesn't always win.

Well, apparently x86 is crappy. It's "70's technology". If it's so damn crappy, why aren't any of the "better" CPU's wiping the floor with x86? I'm not talking about popularity here, I'm talking about performance. If x86 is so damn crappy, how come it performs so well with so little money when compared to some of those "better" CPU's? How come those "better" CPU's are only suitable for running Photoshop-filters [flamesuit = ON]?

Like I said, there ARE faster CPU's out there. But they also cost alot more and they usually get their performance by having lots and lots of cache, and not by being "better CPU-architecture". How well would Opteron 150 (for example) perform if it had 8 megs of L2-cache?

Re:Ho Hum

[Zog The Undeniable]

So you have a Mac, I assume? Well, the x86 architecture *is* a crock, but modern chips only emulate it. They're RISC, superscalar and all kinds of other things I don't fully understand, but certainly weren't featured in the Intel 8086 you might be thinking of ;-)

Re:Ho Hum

[jejones]

Well, apparently x86 is crappy. It's "70's technology". If it's so damn crappy, why aren't any of the "better" CPU's wiping the floor with x86? I'm not talking about popularity here, I'm talking about performance.

For some time, better CPUs did wipe the floor with the x86 family CPUs of their time, but didn't have the advantage of the Wintel monopoly. As for now... if you gave Intel's R&D budget to Motorola to spend on developing the PowerPC, I bet it would improve considerably.

Re:Ho Hum

[fmorgan]

Well, it's very hard to create benchmarks that effectively compare architectures. And vendors (all vendors) muddle the waters.
But actually some x86 (Xeons) are more expensive then PPCs. Some other great chip architectures like Alpha died (or dieing) because of neglect from their corporate owners;
The x86 succeed in part because of the Wintel duopoly. There was a Windows NT port for the Alpha (and PPC, but I think this was only in beta) but it didn't went anywhere.

As for your "photoshop" comments, probably you are thinking about Apple's benchmarks; they use photoshop because that's what a big part of their marketshare cares about.

AS for cache, I don't know about the 8Mb for the Opteron, but the G5 has 512k of L2 and 64Kb of L1. I guess that with 8Mb it might improve a lot also.

As for things like the most used CPUs, probably the x86 don't have that claim. Things like the Z80 probably outnumber them a lot; and they are much cheaper than x86s.

Re:Ho Hum

[flex941]

Is it possible for Intel/AMD to make those chips so I can turn off the x86 emulation crap and use internal RISC directly ... so everyone could slowly migrate away from x86 and CISC?

Re:Ho Hum

[Anonymous Coward]

Something tells me if the billions of dollars per year in R&D were spent on a fully-RISC system, externally and internally, it would be much faster, saving a stage or two of decoding and other internal mangagement, saving a lot of design and testing hassles

something tells me that if you were right, then alpha, mips, ppc and sparc would be ruling the world, and these puny little x86 chips wouldn't be all over the place. But you're not right, and through business or technological decisions, it has not come to pass.

IPF is pretty darn "risc"y, to use an oversimplified term, so maybe you'll get to see your dream brought to fruition, by none other than.... Intel.

Re:Ho Hum

[alienw]

It doesn't matter. Every computationally intensive program makes use of SSE/MMX/3Dnow instructions, which are pretty much meant to bypass the CISC part of the processor.

Re:Ho Hum

[alienw]

Well, it's very hard to create benchmarks that effectively compare architectures.

Why? Take a Linux distro (Gentoo), recompile it for both architectures, run some application benchmarks that represent what you typically do with your computer (i.e. an MP3/Ogg/Divx encoder, Mozilla, OpenOffice...). The thing is, x86 usually wins those types of comparisons. I think that was the point the parent was trying to make.

Re:Ho Hum

[Anonymous Coward]

Of course due to larger number of registers etc this risc system wouldn't have register renaming etc and thus in few years its instruction set would be equally obsolete as the x86's.

Re:Ho Hum

[necro2607]

Actually, when that earlier parent post said "70's technology" I believe it was referring to UNIX, not the x86 architecture. Was x86 even around in the 70's?

Also the PPC isn't just suitable for running PS filters... it was always known as the best CPU for running emulators, for reasons I'll never know (hey I'm not a programmer nor did I even care to emulate old video games), plus it's always been a pretty respected CPU. I doubt the cost of the PPC is any higher than x86, but the rest of the Apple-unique hardware is what makes the costs of Macs so damn high.

I agree though about the cache thing. It seems like x86 CPU manafacturers just load on more cache and claim the architecture is highly improved, when there are only minor differences in actual CPU architecture.

Oh well, it's not like it makes a difference because software just gets more bloated and inefficient as CPU speed increases. It's not like I can go to a web page any faster or load up a game or type an essay any faster than I could 4 years ago, yet I was using a 225mhz computer back then, and now I'm using a 1666mhz computer. Does that make sense do you? It doesn't to me.

Re:Ho Hum

[Anonymous Coward]

> Yes, and modern compilers make quite good use of what they have. Why build/buy more when the returns diminish so rapidly?

No they don't. Ever compared a compiler outputted innerloop with a hand coded one?

> RISC requires higher memory bandwidth, and more memory, to hold the small function instructions. Modern "CISC" cpus are RISC inside - they load a small "powerful" instruction and execute multiple RISC instructions within themselves - without loading all those instruction words over the memory bus.

Complete bullshit. A RISC instruction is often worth several CISC instructions (3 operands vs 2, fused multiply-add, no need to spill registers) yet they may take even less space. A typical x86 instruction consists of a) a prefix byte b) opcode byte c) mod/r/m byte d) SIB byte and e) immediates and displacements. This is five bytes on average. Which RISC needs more than that?

> These days CPUs are basic software design. Build and test a risk core. Then, build and test an interpreter. Layers my boy, layers. A technique as old, and testable, as the hills.

I'm sure Intel knows very well that they could perform better if they broke x86 compatibility. They just cannot afford to do that.

Re:Ho Hum

[Anonymous Coward]

Oh well, it's not like it makes a difference because software just gets more bloated and inefficient as CPU speed increases. It's not like I can go to a web page any faster or load up a game or type an essay any faster than I could 4 years ago, yet I was using a 225mhz computer back then, and now I'm using a 1666mhz computer. Does that make sense do you? It doesn't to me.

That's why we need Forth!: Java done right, 20+ years ahead of time. Virtual machine, extensible language, bottom-up design, efficient, and can even be implemented on a chip.

Re:Ho Hum

[fmorgan]

you are assuming that compilers like GCC are equaly optimized for all platforms?

Re:Ho Hum

[Anonymous Coward]

The biggest issue you run in to there is the effectiveness of the compiler and the applications.
If App A has been optimized for SSE, et al, but nothing for PPC/Altivec, you're going to get a huge difference in speed even though it's "running the same code". Also, the compiler plays a huge role in the benchmarking(e.g. ICC vs. GCC on x86). If GCC produces non-optimal code on the PPC and much more optimal code on the x86, then the slowness in the benchmark is GCCs fault, not the PPCs.

Re:Ho Hum

[Glock27]

AS for cache, I don't know about the 8Mb for the Opteron, but the G5 has 512k of L2 and 64Kb of L1. I guess that with 8Mb it might improve a lot also.

The Opterons have 1 MB (8 Mb) L2 cache where the G5 has .5 MB (4 Mb) L2.

At similar clockspeeds I think the performance is fairly similar, though the Opterons may do better in a dual-CPU configuration since they have on-chip memory controllers and thus more total memory bandwidth.

I'd like to see a head-to-head shootout using top compilers (an often overlooked issue) for both.

Re:Ho Hum

[Anonymous Coward]

> Unfortunately, the best tech solution doesn't always win.

We're not talking about "winning" in terms of market share. We're talking about "winning" in terms of speed and price. The fact is, PPC and such are not significantly faster and/or lower priced than x86, so why should we care about them?

Re:Ho Hum

[Ninja Programmer]

x86-64 only doubles the number of registers.

Which is more than plenty for practical purposes. Having 32 registers with a 32-bit opcode size just means that 16 of them will be rarely used, and you run out of opcode space, and therefore operate in fewer modes requiring more instructions to perform the same work.

Re:Ho Hum

[fmorgan]

That you are VERY, VERY wrong.

Of course a $200 WalMartPC is cheaper than a dual G5, but a dual G5 is cheaper than a Dell 2xXeon (not even talking about an Itanium).

And I heard a senior officer at Wolfram (Mathematica) saying that they couldn't really compare speeds because the Dell 2xXeon was so inferior.

I have no idea about the new AMDs, but this was last year (July 2003), so there might be some news next month at WWDC.

Re:Ho Hum

[Sj0]

Don't bother to let a little thing like the facts get in your way! GO ANTI-x86!!

(really. Ignore those extra registers on the a64. They're just for show....or something......really.)

Re:Ho Hum

[Anonymous Coward]

> No they don't. Ever compared a compiler outputted innerloop with a hand coded one?

Yea, they do, and yea, I have. Absolute Perfection(tm) of an instruction rarely performance of a system makes. Compilers may not be perfect, but they're usually well beyond good enough. Good compilers are have been really quite good at register allocation for some quite time.

> Which RISC needs more than that?

Those that need to accomplish the various options offered. Ever compared assembly instructions sets by using them in actual practice? I have. In many cases you use 1 Risc or 1 Cisc. Often you need 1-5 risc to 1 cisc. Rarely, if ever, do you need 2+ cisc to perform a risc. Ever wonder why rule of thumb for sizing a RISC system generally requires twice the memory as a CISC (for similar loading)?

Perhaps the CPU will, ultimately, be left accessing that memory? Would that imply a possible rough doubling (on average) of CPU-Memory bandwidth?

Yea, it does.

> I'm sure Intel knows very well that they could perform better if they broke x86 compatibility.

Why would they know this? (Seeing how it's just not true.) There have been, and are now, lots of processors - and exactly NONE have flat out outcompeted the x86. We have fractional advantages here, or there, but NOTHING out there that HAS "broke x86 compatability" has screamingly outperformed it.

Linux supports LOTS of CPUs. And, x86 still pretty much sits at the top of the performance heap.

Re:Ho Hum

[Anonymous Coward]

God, yet another incompetent individual who has no clue what CISC/RISC really means, and what the "supposed" advantages are. Here's a clue, quit reading the bullshit you hear about "x86 being shit" and use your fucking head. Take a class. Learn something.

Re:Ho Hum

[10Ghz]

Well, Apple uses GCC as their compiler, they obviously believe that it's well enough optimized for G4/G5

Re:Ho Hum

[Anonymous Coward]

Yea, they do, and yea, I have. Absolute Perfection(tm) of an instruction rarely performance of a system makes. Compilers may not be perfect, but they're usually well beyond good enough. Good compilers are have been really quite good at register allocation for some quite time.

Then why I keep getting twice the speed by hand-tuning an expensive innerloop? The most important thing that I do is to juggle around register shortage. In the old days it was nice if you managed to write a texture mapper using only registers. Adding gouraud required either self-modifying code or a memory reference. Writing code for two textures actually _hurt_. Not only the increments were in memory but the counters as well. None of this would have been necessary with 32 registers.
Today, some optimization guides say it doesn't matter and claim that foo reg, mem is equally fast as foo reg, reg. Well, they are lying. There are only so many ports to the cache and instruction count has still relatively linear effect on performance. That is, if you have done your homework and the code isn't lagging due to cache misses or so.
MMX/SSE having different set of registers is of enormous help, but they also require more of them due to larger latencies. The limit of obtainable parallelism is sometimes near: the processor has completed the operation with mm0 right when the code has shuffled through all the other registers. (or maybe even slightly after, register renaming can give some extra but it can't do miracles when the lanes are almost full)

Those that need to accomplish the various options offered. Ever compared assembly instructions sets by using them in actual practice? I have. In many cases you use 1 Risc or 1 Cisc. Often you need 1-5 risc to 1 cisc. Rarely, if ever, do you need 2+ cisc to perform a risc. Ever wonder why rule of thumb for sizing a RISC system generally requires twice the memory as a CISC (for similar loading)?

Well, okay - I sort of ignored the bulk code (99% of stuff where 1% of time is spent) as if it didn't matter to performance, but since larger programs mean more bloated system it obviously does to some extent. However, for the processor it isn't such a big deal. x86 already becomes tad slow when the code isn't in the cache (deciphering takes time..) yet you rarely see that viewed as a serious performance bottleneck. Wonder why? Because 99% of time isn't spent there!
Even when it does become one, RISC might require more bandwidth, but it's still all that's required for decoding more than one instruction per cycle. No need to brute force it with a huge amount of parallel decoders. x86 processors currently don't go that far because it's expensive and doesn't buy much.

Why would they know this? (Seeing how it's just not true.)

Of course it's true. Haven't you seen benchmarks between x86-64 and ia32? It did break the instruction set compatibility and allowed using more registers. No difference whatsoever? Yet it's yet another awful prefix kludge with an absolutely minimal change to the instruction set. Using slightly different logic you could have doubled the extra bits per instruction in the same space.

There have been, and are now, lots of processors - and exactly NONE have flat out outcompeted the x86.

You mean like the Alpha?-)

We have fractional advantages here, or there, but NOTHING out there that HAS "broke x86 compatability" has screamingly outperformed it. Linux supports LOTS of CPUs. And, x86 still pretty much sits at the top of the performance heap.

Moot point. We also haven't had such a competition outside x86 market. There's no way to know how far other designs could be pushed with similar resources.
Of course if recompilation every few years isn't an option even they get eventually stuck with an obsolete design which might be even worse than Intels..

Re:Ho Hum

[alienw]

Use whatever is the standard compiler for that platform. For G5, that would be GCC. After all, how good a compiler is largely determines how fast the processor is, so if a really fast processor doesn't have a good compiler, then it's worthless for nearly all practical purposes.

Re:Ho Hum

[alienw]

Well, for one, if nobody optimizes their applications for Altivec, then that technology is not very useful, at least for desktop users. Therefore, if your objective is to use the system for, say, running Gentoo, then it is a fair benchmark.

Synthetic benchmarks are almost never fair, simply because every processor has its own advantages. For instance, any benchmark which heavily relies on fast system memory would run circles around the G5 when run on an Opteron, since the Opteron connects to memory directly (and uses NUMA in a dual-proc configuration). If your benchmark merely does computations, then the G5 may very well be faster. If I try it out with a real-world application, I will know for sure that it is either slower or faster at that application.

Re:Ho Hum

[TheLink]

5 bytes? Do a search on Google. The average x86 instruction is about 3.2 to 3.8 bytes in length (in practical usage).

Most RISC have fixed length instructions - 4 bytes is common.

In my experience most x86 programs have a smaller footprint on disk and more importantly in memory compared to SPARC versions of the same program.

Probably SPARC sucks, but ok pick the RISC of your choice and get back to me with the associated binary executable sizes (e.g apache executable, gzip executable) compared to equiv x86 binaries.

Think of x86 CISC in modern CPUs as compressed RISC instructions, decompressed on the fly at the CPU core after being squished through narrow bandwidth channels ( memory/cache ).

Nowadays given the huge difference between CPU core speeds and memory speeds, "compression" is actually useful. A more compressed CISC could be even better (but I doubt there's a market for one).

"I'm sure Intel knows very well that they could perform better if they broke x86 compatibility. They just cannot afford to do that."

BTW Intel has this processor called the Itanium. And in _practice_ it's not really x86 compatible[1] (nor is it RISC). It performs quite well, FP is much better than Opteron (and other RISC processors). But actually FP is easy to improve - just add more FP units.

So they've already tried to drop x86. Been trying that for the past 10 years.

[1] Itanium Windows compatibility
Itanium RHL compatibility

Compiling

[IceFox]

Has anyone done any compiling tests? If so PLEASE share! -Benjamin Meyer

Re:Compiling

[Anonymous Coward]

The most I can tell you is this: the Athlon 64 FX-53-- that's the "enthusiast" version of the Opteron 150, which is for all intents and purposes the exact same-- does exceedingly well in code compilation according to the benchmarks that mainstream hardware enthusiasts have done. AT showed it compiling code ~28% faster than a Pentium 4 3.2 (Northwood, Prescott falls back more-- presumably this is because code compilation hates long pipelines, which means it hates NetBurst ;-).

Now factor in that the current Xeons have a relatively anemic FSB, that multiple Xeons scale like bricks (I sound like a fanboy, but I'm telling the truth; until Intel bumps them to FSB800, they'll keep scaling like this), that these tests were done (IIRC) in WINDOWS with a Microsoft compiler, and that multiple Opterons scale nicely.

So... zoom, probably.

Re:Compiling

[Anonymous Coward]

Did somebody say Gentoo?

Re:Compiling

[Illissius]

AnandTech usually does them in their processor reviews, lemme dig one up.
Here's one, for example.
(Of note, the Athlon FX-51 and -53 are identical to Opteron 148 and 150 processors, respectively. The Athlon 64s are similar as well, difference is they use a different socket, have only single-channel memory controllers, and use unbuffered/unregistered memory.)

Basically, the Hammers are godlike at compilation.
The lowest-rated (at the time; a 2800+ has since been released) A64 3000+ beats the fastest P4 3.4GHz Extreme Edition.

Re:Compiling

[vicotnik]

Informative? If you look at the test you linked it doesn't seem like the A64 3000+ beats the P4 3.4EE in general, in fact it looks like it's slower in most tests.

Re:Compiling

[Anonymous Coward]

What part of "at compilation" are you incapable of comprehending?
Of course it's slower in most tests, it costs $200 to the P4EE's $1000. That it's faster at compiling merely shows the A64's prowess at this particular task.

Re:Compiling

[vicotnik]

It's just a compilation of a single program with a single compiler in a test where it is not faster in general.

Re:Compiling

[KirkH]

He was addressing the compilation test specifically, which is the one he linked to and the one where the slowest Athlon does indeed beat out the fastest P4.

So, yes, I would say his post was informative.

Re:Compiling

[vicotnik]

Yes, I missed that he was replying to a question about compilation...I thought he just picked one good score in a test and stated that it showed that it was extremely good in that area when it could have been specific for that test (since it wasn't better in general). It would be interesting to see more compiler related tests to determine how good it really is in that area. Anyway, sorry about about the lazy reading.

Waste of time...

[Anonymous Coward]

Can somebody please benchmark a dual AMD opteron against a dual PPC 970 (MAC G5), using Linux in 64bit mode. What is with all these kids benchmarking opterons in 32bit mode?

Re:Waste of time...

[adzoox]

I agree - not everyone who wants a computer at an ad agency wants a Mac and not everyone who owns a Mac wants/needs/can afford another.

I wish all Intel/AMD chip benchmarks would include how they rate against the PowerPC.

Re:Waste of time...

[Anonymous Coward]

Has it occurred to you that people who buy this chip won't be using it for 64bit applications?

I know, it's dumb, but I think the 64bit stuff is for later. Besides, what good benchmarks can you suggest in 64bit mode?

AFAIK they don't have 64bit editions of 3dsmax or the other things they used to benchmark these chips.

Pssst, it looks like these guys don't use linux. They COULD have used 64bit editions (like Mandrake 10 64bit edition) of linux, but they probably don't even know about linux. Looks like they're windows fanboys to me.

So yeah, complete waste of time.

Re:Waste of time...

[ValourX]

64-bit vs. 32 bit using FreeBSD

Don't you ever read the BSD section?

-Jem

Re:Waste of time...

[DarkSarin]

I suspect that the real reason that this does not occur is because most review type sites are a) not using linux at all, b) cater to a specific audience and c) want to use all the same test suites and benchies that everyone else does, and therefore can't use linux.

Personally, I think its a huge mistake. IF I had the money to start doing these types of reviews, that's exactly what I would do...use linux and bench against ppc as well as x86.

The reason is that linux is multi-architectural, unlike windows, and could give some added insight to the tech field. Furthermore, we could start seeing some tests of 64-bit goodness, and really see how these procs are doing. Even better, we could throw in some other chips, such as the UltraSparc and the Alpha to get a really cool look at how they stack up.

Unfortunately, I don't have the cash. I would take donations, and/or equipment, however...

Re:Waste of time...

[Anonymous Coward]

No but I do frequent Netcraft and they confirm...

Okay but I am talking about 64bit SMP systems here, FreeBSD hasn't had SMP for too long has it; stable? Does it even compile on a PPC970? I don't know because I only run (open)BSD on a couple of firewall boxes, here we don't have working SMP kernel.

Oh and Jem, I did skim read your comparison back when you originally posted it, close but still not what I'm looking for.

-AC

Re:Waste of time...

[phoxix]

Can somebody please benchmark a dual AMD opteron against a dual PPC 970 (MAC G5)

Not so fast, a significant problem in such a comparison is that gcc has *much* better support for x86-64 than it does for PPC64. If there was even a chance that a dual PPC970 machine was faster than a dual x86-64 machine, the likes of Yellow Dog, and Momentum Computer would have been all over it.

Sunny Dubey

Re:Waste of time...

[Jeff DeMaagd]

That depends on how well the software fits the architecture, how well optimized GCC is, etc. It would also depend on testers getting G5s and the other systems.

Re:Waste of time...

[dave_f1m]

Sounds perfectly fair to me. I don't care which machine is theoretically faster, I don't care which does 'X' faster, when 'X' is something I don't do. I primarily run Linux on the workstations, and the question I would like answered is, which is faster for me? If the PPC is a faster chip, but anything I run on it is slower, then I don't really care if the chip is 'faster', it would a slower platform. Yes, some people would use it to compare just the chips, but it would not be a 'waste of time'.

Re:Waste of time...

[troc]

Naah, it's Beleagued and Dying :)

Troc

Re:Waste of time...

[joib]

Not so fast, a significant problem in such a comparison is that gcc has *much* better support for x86-64 than it does for PPC64.


Well, lots of reviews trashing ppc64 sounds like a good incentive for apple to help out the gcc project then. BTW, doesn't apple use gcc as the system compiler for OS X? In that case, you can't even dismiss gcc performance as only something those dirty GNU/hippies care about.

Re:Waste of time...

[ValourX]

It would be better to wait for 5.3 before trying an SMP comparison. It's not too far off. I just need to get an SMP system for testing... shouldn't be too hard at this point.

I could also test with GNU/Linux. SuSE makes a fine testing platform for 64 vs. 32.

-Jem

Re:Waste of time...

[Wesley Felter]

So use XLC on the 970 and the PathScale compiler on the Opteron.

Re:Waste of time...

[Anonymous Coward]

Apple uses a fundamentally slow kernel for the basis of their flagship operating system. The only performance figures they care about are the ones they fabricate and put on their website to convince the faithful than the Mac beats the x86 are Quake 3.

Re:Waste of time...

[Anonymous Coward]

The last paragraph inspires hope

Re:Waste of time...

[JBv]

Well, IMHO, bechmarking with the same gcc would give valuable information for the number cruncher in me.

I couldn't care less about the maximum CPU performance, but I do care a lot about how fast my programs run on each machine.

Since gcc comes with linux and macosx, in my view, it would be a very pertinent test.

Re:Waste of time...

[Anonymous Coward]

Downloading jpegs and mpegs isn't highly dependent on processor speed, so it's probably not so important which you use for your purposes.

Re:Waste of time...

[troc]

Hmm, seems BSD supporters have no sense of humour either..... :)

Troc

Re:Huh? Pentim 4 Extreme

[AgntOrnge]

I'll refrain from mentioning how you are horribly off-topic but at any rate, give this a try for answers somtime. www.google.com In short the Extreme editions are a Northwood core with 2MB of L3 cache.

A word of caution

[GigsVT]

I had an AMD64 chip with the heat spreader.

I went to take the heat sink off the other day, and the vacuum that formed between the heat spreader and heat sink caused the chip to get yanked right out of the closed ZIF socket when I tried to get the heat sink off.

Then, after reinstalling the chip, apparently the heat spreader has become disconnected from the core internally, because the CMOS reports rising temperature up to 120C, but even the heat spreader isn't warm if I turn the system off and get the heat sink off again.

So be very careful. It takes about 10 minutes to take the heat sink off the heat spreader if you used a coating of grease that covers the whole top of the chip, even if you used a thin coat. You have to wiggle the heat sink and gently pull up for quite a while before that vacuum is broken. It doesn't help that the heat sink design makes it impossible to see the chip or slide the heat sink to the side.

And be aware that it doesn't take a whole lot of force to yank the chip right from the ZIF, possibly damaging things in the process.

Re:A word of caution

[GigsVT]

What?

I can't believe I'm being modded down as troll, and getting silly replies like yours.

This really happened to me. I don't buy Intel chips anymore, and haven't for years, but I'm not too happy about having to replace a chip that I bought a few months ago, probably out of my own pocket since newegg won't take an OEM CPU back that is over 30 days out, and they claim to not take any back that have physical damage either (though I don't know if this would count, I don't see how a design flaw is my fault).

Re:A word of caution

[MoronGames]

The problem is that you're using too much thermal compound. Generally, you use no more than an amount the size of a grain of rice, and spread it out to cover the entire heatspreader, and the bottom of the heatsink. Not only will this give a lower chance of damaging something, but it will also get better heat transfer and drop your temperatures.

Re:A word of caution

[Anonymous Coward]

You shouldn't have broken it then. Chips are designed to be plugged in once, have a heatsink placed over them once, and to be left in the system after that.

Anything else that's possible with a socketed CPU is just luck. Usually though, you can extract CPU+heatsink in one go, and put it in a new machine.

Re:A word of caution

[Anonymous Coward]

Even that is too much.

If your CPU contact area and heatsink have a mirror finish then you really don't even need heatsink compound. Of course it's very difficult to make them stay together without using something so the compound is good for that.

But you only need a thin film. And I mean thin . As thin as you can possibly make it.

The goal is metal-to-metal contact which provides the best heat transfer, the heatsink compound is only there to fill in any tiny imperfections and hold the pieces together. The best heat transfer is metal-to-metal though.

Re:A word of caution

[Anonymous Coward]

OK, so I've got a dumb question. I got a new heat sink the other day and it had a little gray patch stuck on it right where the processor would touch the heat sink. Is that part supposed to stay on or come off? I left it on, and everything seems to be working OK, but I've got this nagging feeling that the gray thing is just there to protect the heat sink from scratches.

Re:A word of caution

[Callitrax]

I got a new heat sink the other day and it had a little gray patch stuck on it right where the processor would touch the heat sink.

This is a "Thermal pad" - meant to doe the job of a paste and/or good lapping but in general they suck. You are best off removing it completely and using the grease.

Re:A word of caution

[necro2607]

This is why you never take the heatsink off while the CPU is still in your motherboard... I thought everyone knew that?

Re:A word of caution

[GigsVT]

It's impossible to do it any other way, with AMD64 at least (which has a shroud around the base of the heatsink), and most chips for the last 5 years... the heatsink overhangs the ZIF lever.

Re:A word of caution

[clacke]

And be aware that it doesn't take a whole lot of force to yank the chip right from the ZIF, possibly damaging things in the process.

I see. So it doubles as a ZEF, then?

Re:A word of caution

[necro2607]

Ahh I wasn't aware of that with the AMD 64-bit CPUs. I've got a 32-bit AMD CPU which is easily detatched from the motherboard with the heatsink attached. Actually... nevermind. I have no clue what I was talking about. The heatsink *has* to be removed to even get the CPU off, considering the heatsink clips onto the socket on the motherboard... I have no idea why I thought that the heatsink was supposed to somehow stay on... hmm, maybe I should try and get more than 4 hours of sleep a night...

Re:A word of caution

[delus10n0]

Guess next time you'll buy RETAIL instead of OEM?

Re:A word of caution

[GigsVT]

It might be worth the warantee.

Re:A word of caution

[Anarke_Incarnate]

Mirror finishes are bad. You need something with minute pockets (because even your mirror finish will have them) to retain the thermal compound. The purpose of lapping is not to cause the surface to be perfectly smooth, but rather to make the surfaces flat and allow for them to rest on each other so as to not have any gaps due to uneven layers.

Re:A word of caution

[Strange Ranger]

If you run the CPU very hot for awhile (e.g. play a game) the goo will soften quite a bit and the heatsink will come off pretty easily. Or if it really is a vacuum, the heat of the CPU will expand everything including the air and make the vacuum much weaker or gone altogether. Just run it hot for 10 minutes then shut right down and do the replacement while it's still pretty warm.

I can attest this works nicely for P4's. Before learning this trick I got quite good at straightening P4 pins. groan.

Re:A word of caution

[GigsVT]

Oh, it really was a vacuum. Once I got it off and cleaned it, and put a tiny amount of grease back on, it formed the vacuum again instantly, and required several minutes of coaxing to come off again.

I don't think it's air trapped in there per se, it was warm when I originally took it off. You don't need air bubbles to have a vacuum.

Have you ever seen a machinists gauge blocks? They are very polished and flat metal blocks. If you stick two of them together, the lack of air between them actually makes them stick together. I think it's a similar effect here. If air can't get in, then it's a vacuum. :)

Re:A word of caution

[Anonymous Coward]

In the instructions provided with my Athlon64 I just installed today it warned about just that type of problem. They had an entire section dedicated to removing the heatsink.

Re:A word of caution

[TheLink]

I doubt you are right. The thermal conductivity of the thermal compound is much worse than the two surfaces. The compound's thermal conductivity is better than air, which is why you use the compound, but if you get a mirror finish, then you have a lot less air and compound between the two surfaces on average.

It's just things are designed so that a mirror surface isn't necessary - there's enough margin for how most people use it.

AMD's Cool 'n Quiet

[niko9]

...the Opteron 150 looks like the fastest x86 CPU on the planet.

I know I might be nitpicking here, but I really wish the Opteron series of chips incorporated AMD's Cool 'n Quite technology.
From what I read on their website, with a supporting motherboard and driver (2.6.5 has a native driver) the Athlon 64 can scale down to 800Mhz, cool enough for the system to shut the HSF and case fans completely offoff.

One demo I saw online had a Athlon 64 SFF computer playing a DVD while the AMD cool 'n quite app was shoing the the CPU at 80hz and the system was totally silent.

Coudn't server rooms benfit from the reduced electricuty bill also?

Re:AMD's Cool 'n Quiet

[thorgil]

...ite app was shoing the the CPU at 80hz and the system was totally..

80Hz ???? ... man thats slow.

Re:AMD's Cool 'n Quiet

[Anonymous Coward]

Cool N Quiet mode is 800MHz for older A64/Opteron chips. Newer chips will run at 1GHz in CNQ mode.

Re:AMD's Cool 'n Quiet

[niko9]

Correction. That would be 800Mhz.

Sorry for the typo.

Think of the power savings for those who like to leave their PC's on for filesharing or whatnot.
Would also make for a better nights sleep, if the ATX case is in your bedroom.

Re:AMD's Cool 'n Quiet

[-tji]

Based on the reports I have read, the Opterons can't do CnQ because of the ECC registered memory they use. The registered memory cannot handle the voltage variations that CnQ uses.

This is the reason I went with the A64. In trying to make the quietest system I could, the CnQ feature is great.

Re:AMD's Cool 'n Quiet

[Wesley Felter]

Yes, servers can benefit from dynamic voltage/frequency scaling (aka Cool'n'quiet). My colleagues wrote several papers on this topic.

Re:AMD's Cool 'n Quiet

[Dravik]

Sleep!! without the comforting whirring of my computer fans? The pain, the agony! I can't stand to think of such a thing any longer.

Re:Think it's time to seriously consider AMD

[turgid]

So you've been living under a rock for the last four years?

Re:Huh? Pentim 4 Extreme

[Anonymous Coward]

Is that why they use the fucked up spelling with the "u" missing???
WoW! Thanks for clearing that up,You fat,stupid fuck.
Read again.

Great, but how fast can they compile the kernel?

[freelunch]

Nice article, but we need more Linux-centric bench and test sites.

Hmm.. Pushing the top end...

[Forge]

.. means cheaper CPUs at the bottom end.

My needs are simple, Most of my systems would do just fine with a Duron 800MHz or even slower CPUs. With the advent of new high end chips heralds lower prices at the low end.

It's gotten to the point where only a few popular niches need to even bother with anything but the absolute bottom end chips. I.e. Gaming, video encoding and servers (Faster chips mean more users on a server).

Scientific Computing clusters, Compiling lots of code everyday etc.. are other niches worth noteing. For Web browsing, Office productivity, educational apps and old games I advise you to buy the chip so far behind the curve it won't be available in a few weeks.

Re:Hmm.. Pushing the top end...

[Anonymous Coward]

"With the advent of new high end chips heralds lower prices at the low end."

I wish it was true. But it only means that the older chips will be discontinued. Pricepoints will stay the same. I'd love to be able to buy a 5 gig system only drive for like $40. Instead you can get an XX gig for $100 with the occational sale bringing things down to ~$80.

The price does not decrease. The capability rises while the pricepoint stays the same.

Re:Hmm.. Pushing the top end...

[Forge]

Quoting myself :) 'I advise you to buy the chip so far behind the curve it won't be available in a few weeks'

Re:Hmm.. Pushing the top end...

[necro2607]

That's generally true, although with things like RAM that's totally not the case - PC133 ram is stupidly expensive for its slow and outdated performance - it still costs $50 for a 128mb DIMM. The same amount DDR ram is actually cheaper!

I realize it's partly due to the fact that far fewer companies manufacture the older RAM, but either way, paying high prices for outdated hardware seems kind of odd if you ask me...

Getting back to your original topic, another good thing about new CPUs getting faster is the "old" computers that get thrown out are getting faster, too. I found a 400mhz Celeron computer thrown out behind a computer store, as well as numerous 166mhz Pentium systems. Most were stripped of their parts, but the motherboards/CPUs were still there.. awesome :)

Re:OT - WTF?

[Anonymous Coward]

The firewall has blocked Internet access to you computer (TCP Port 4957) from slashdot.org
(66.35.250.150) (TCP Port 43917) (TCP Flags: S)

Have they alwa[NO CARRIER]

Re:Huh? Pentim 4 Extreme

[Anonymous Coward]

Oooh, did someone just miss the point? I think someone did...

Re:Think it's time to seriously consider AMD

[frozenray]

Indeed, the outlook for AMD looks good given their roadmap and Intel's problems:

• The "Prescott" P4 got mostly negative reviews, c't Magazine mentions in their current issue that Tejas (Prescott's planned successor) is being scrapped
  
• For all the money they invested into Itanium, they seem to be lacking a coherent strategy for the architecture (or if they have one, they're not talking about it)
  
• Their new processor rating and the power requirements of the Prescott line may be an indication that they cannot continue to crank up the clock on the CPUs any longer (GHz being the primary sales generator) without running into major problems with leak currents
  
• AMD has processors which are looking more interesting to businesses than the previous CPUs, plus they have taken the lead in 64-bit processors for desktops and have dual core CPUs in the pipeline (heh)
  

It will be interesting to see how Intel responds to these challenges - c't speculates that the future Pentiums will use the architecture they have in the Pentium M line (developed in Israel). If they're smart they'll introduce a dual core CPU based on the Pentium M architecture, if AMD is smart they'll modify their existing designs and beat intel to the punch again.

Speaking as a business user, I'd welcome an emphasis on ergonomics and environmental concerns over raw speed. I'd rather have silent systems that do not overload the air conditioning with enormous amounts of heat than screamers which spend 99.9 % of their time waiting for the user to press a key anyway.

Bonus!

[Anonymous Coward]

I can also see more clearly how laughably far behind my box is. Damn that BSD. It runs so well on "ancient" hardware that I have no need to upgrade.

I wish it would hurry up and die.

Re:Huh? Pentim 4 Extreme

[AgntOrnge]

That's a lot of animosity for an anonymous coward. Someone needs a good solid bitch slap

Re:Think it's time to seriously consider AMD

[enigmals1]

Um... HUH?? The K6-2 and especially later the K6-3 ran RINGS around the same speed Pentium and P-II chips of the day?! What the heck are you talking about?!

All I can say is...

[Azureflare]

Thank GOD for competition! I couldn't stand living with Intel as a monopoly if they took that kind of lazy attitude.

It's my hope that AMD and Intel will be eternal rivals, and continue advancing and coming up with better products.

Re:Think it's time to seriously consider AMD

[wolf31o2]

It will be interesting to see how Intel responds to these challenges - c't speculates that the future Pentiums will use the architecture they have in the Pentium M line (developed in Israel). If they're smart they'll introduce a dual core CPU based on the Pentium M architecture, if AMD is smart they'll modify their existing designs and beat intel to the punch again.

Funny enough, that is exactly what Intel has planned. They will also be shooting for dual-core, and then quad-core CPUs in the next 2-3 years. On the flip side, AMD has announced that they are already capable of producing dual-core Opterons, and are simply waiting for the market demand to meet their capabilities. After all, it doesn't make much sense to introduce something now that can wait until later. It extends the life of the current line and increases the return on R&D.

Maple/Mathematica benchies while at it...

[Anonymous Coward]

http://smc.vnet.net/timings50.html is a start.

Sad times when a

Dell Precision 650, 4X3.06GHz Xeon, 512KB L2, 4GB, Win XP Pro V5.1 [35]:

is slower than a

Athlon 2800+, 512 KB cache, 333 MHz FSB, Win XP Pro

Re:Maple/Mathematica benchies while at it...

[Quikah]

dell precision only supports 2 processors.

Re:Maple/Mathematica benchies while at it...

[Anonymous Coward]

HT effect!

Re:Maple/Mathematica benchies while at it...

[sirsnork]

Not to mention XeonMP processors aren't up to 3.06GHz, and thats what you need for 4 way

Re:Maple/Mathematica benchies while at it...

[Anonymous Coward]

Nonetheless, a slower, single AMD beats an SMP+HT Xeon.

Question about itanium2 - Opteron

[cazzazullu]

Here at the physics lab we are doing research about neural networks. This involves simulations that require a lot of memory and cpu-cycles. A problem we have encountered numerous times when building phase-diagrams is that the mathematical routines chrash when we reach critical parametervalues. This is caused by the fact that certain matrices become 'singular'. This problem does not arise however when we use 'double long' formats, or 64-bit floats, because these are way more precise and still can go a long way when 32-bit doubles already jump to zero, thus causing the problems.

We have decided to buy/construct a fast 64-bit workstation where we can run our simulations without chrashes. Now my question to you fellow slashdotters is:

The budget is a few thousand euros, not over 10 000 (this is comparable in dollars). What would the best bang-for-the-euro be? Single-Dual? Xeon-Opteron-Itanium2? It must at least contain 4 gig of RAM.

Thanks for your suggestions, looking at several "comparison-websites" has only made us more confused.

Re:Question about itanium2 - Opteron

[painehope]

Best bang for (euro)buck? For 10K you can probably build a 4 way Opteron system w/ 8 GB of RAM, especially if you are getting any kind of educational discount. I would definitely suggest Opteron, as from experience w/ vendors, they seem to be priced about the same as Xeons ( which are the current cheapest ), and do 64 bit and are also a bit faster for some apps. I would probably look at a 2-way Opteron system w/ 8GB of main memory, and then after that begin looking at either a 2nd workstation/server, or 4-way, if you have any money left.

Re:Question about itanium2 - Opteron

[flex941]

I think with that kind of money you should buy Dual-Opteron machine (with 244 or 246 cpu) and let it be built by some local not-so-expensive company (or even yourself). If corporate support is really not so important, then don't buy from IBM/HP/you-name-it (you will end up paying up to two times more than neccessary).

Itanium2 is out of your league and there is no point spending money on half-baked (and cloned from AMD) 64bit Xeon. Opteron's hypertransport and on-die memory controller is what makes real difference to intel's old architecture.

Re:Question about itanium2 - Opteron

[Anonymous Coward]

I'd suggest the Opteron as well... a dual Opteron with 4 GB of RAM right now is about USD3000. (Depending on which CPUs you go with!)

For your few thousand euros, you can either get a very speedy dual Opteron with 8 GB of RAM, or possibly 2 dual Opterons of a slower clock with 4-6 GB each. Depends on what you need.

More importantly, if you want to try running on an Opteron first, if you leave some way of contacting yourself here, I'll drop you a note and my lab might be able to help you benchmark.

We've run our codes on Itanium2s as well, but were not happy with the performance. This was not a neural network simulation, though, so YMMV.

Re:Question about itanium2 - Opteron

[mjuarez]

The budget is a few thousand euros, not over 10 000 (this is comparable in dollars). What would the best bang-for-the-euro be? Single-Dual? Xeon-Opteron-Itanium2? It must at least contain 4 gig of RAM.

Itanium servers are out of your league. A decent 1.5Ghz Itanium chip with 3Mb of on-die cache will set you back around $3,000. Not including memory, hard disks, etc. Just for ONE chip.

Xeon are way cheaper, but in most cases are more expensive than Opterons, do not scale very well when used in 2-way or higher configurations, and can only use 4Gb in flat mode. To access above 4Gb, you need to use PAE, which greatly hampers the performance (PAE is akin to the "high-memory" window trick they used back in the DOS days).

Opterons, on the other hand, are usually cheaper than Xeons, much cheaper than Itanium, almost always have better performance that Xeons, scale much better (in fact, a 2-way server performs better than a 1-way times 2!) and are only beat by Itanium in floating point performance, and then only barely.

There's another thing. Opterons are going to become dual-core in less than 2 years, with the same pinout as today. That means that if you have a lowly 2-way server that you're thinking about dumping, you can buy new dual-core Opterons and instantly get a 4-way out of your old 2-way server. Also, Opterons can access linearly up to 1Tb of physical RAM (that's 1,024 Gb), and up to 256Tb of virtual memory. And, finally, it's the only 64-bit processor you can get today that works with all your 32-bit x86 software. Finally, Opterons consume less energy than equivalent Xeons or Itaniums, and this becomes very important when thinking about A/C, UPS, standby power generators, etc.

I'd recommend you go with Opteron. Check out some well known tier-2 vendors such as Angstrom, Appro or Verari. They all make excellent quality Opteron servers and workstations. If you want brand names (and are willing to pay for it), check out Sun, Hewlett Packard or IBM for 2-way servers, or HP for a 4-way. IBM even has a dual Opteron workstation, if that's what you want.

Good Luck,

Marcos

Re:Question about itanium2 - Opteron

[joib]

This problem does not arise however when we use 'double long' formats, or 64-bit floats, because these are way more precise and still can go a long way when 32-bit doubles already jump to zero, thus causing the problems.


On the x86 architecture, "long double" is 80-bit, and not 64-bit, which is plain "double". "float" is 32-bit.

However, note that the x86 does all floating point operations with 80-bit precision. So you don't get any performance advantage from using only single precision variables (other than lower memory bandwidth usage). Thus, a good rule of thumb is to always use double (long double might be better but isn't portable, and SSE doesn't support it if you want to use that). Single precision is mainly useful when you want to store large amounts of data (remember to cast the part of the data you're working on to double before calculating).

As others have pointed out, currently the Opteron is quite unbeatable in price/performance. 10000 EUR should certainly get you a 2 cpu system. Probably not 4 cpu:s though? Given that you need lots of memory, especially avoid the Xeon (or some other 32-bit architecture). Linux can only give 3 GB to one process with it's default configuration (I guess windows is similar?). With the so-called 4g/4g patch you can allow 4 GB for each process, but the price is lower performance. With a 64-bit architecture all those problems disappear.

Re:Question about itanium2 - Opteron

[smurf975]

You could use a Apple dual g5 but I don't own any Apple machines so I can't tell how good they really are.

Look at this site that another slashdotter posted several posts before you: http://smc.vnet.net/timings50.html (mathimatica benchmarks)

Re:Question about itanium2 - Opteron

[Spoing]

1. There's another thing. Opterons are going to become dual-core in less than 2 years, with the same pinout as today. That means that if you have a lowly 2-way server that you're thinking about dumping, you can buy new dual-core Opterons and instantly get a 4-way out of your old 2-way server.

Even if the pinouts stay the same, the system boards you can buy now might not support the processors being sold in 2 years.

Why upgrade the CPU only in 2 years and skip the other improvements available at that time?

I have very infrequently had a CPU upgrade that was worth it, while updating other components (disk, network, added RAM, video, ...) usually do give a reasonable boost. Most of the time the modest real performance increase from swapping in a new CPU -- one that is bound to the limits of the existing system board-bound -- isn't worth the time or money.

The only exception I can think of is if you buy behind the bleeding edge and upgrade every 6-9 months to a processor that is substantially better (2x) but not bleading edge.

To do this properly usually requires getting an advanced system board that can handle the higher end components and then turning around and being cheap on the CPU. While this can be a good idea, it usually isn't and the situation is very specific to the system board.

1. IMNSHO:
2. Always buy what you need today and do not look over 6-9 months in the future for upgrades.

If you expect a payoff in a future upgrade, make sure that the hardware you buy now is also what you need today and do not depend on a future promise. If it works out, HOO-RA! If not, you haven't lost a thing.

Re:Question about itanium2 - Opteron

[Mikkeles]

Have you thought about getting a mathematician/numerical analyst (e.g. grad student) to take a look at your system? Brute forcing singular matrices usually doesn't scale well. Being able to identify the critical points would probably give you more bang for your euro.

Re:Question about itanium2 - Opteron

[Anonymous Coward]

I'd suggest going over to http://www.aceshardware.com/forum and asking some folks who are currently using them and other systems how they have liked or not liked the opteron experiences as opposed to their xeon experiences.

Re:Question about itanium2 - Opteron

[lukesl]

I work in a neuroscience lab, where we were running up against the wall of 32-bit address space. We ended up getting a quad opteron system with 16GB of RAM, and it's been great. AMD releases a highly-tuned math library called the "AMD Core Math Library" that has a full implementation of LAPACK, as well as a bunch of FFT routines. If you download octave (a matlab-compatible analysis package), you can recompile it and link it against the ACML, resulting in some serious speed improvements over matlab or C code linked to generic math libraries. I strongly recommend looking into this.

Re:Question about itanium2 - Opteron

[hoof]

"However, note that the x86 does all floating point operations with 80-bit precision. So you don't get any performance advantage from using only single precision variables (other than lower memory bandwidth usage)."

Actually, division and square root are faster in single precision mode. FDIV is 18 cycles for single precision vs. 38 for extended precision on a PIII.

Re:Question about itanium2 - Opteron

[cgori]

If you care about floating-point performance, regardless of how much I dislike the boxes, Itanium has the best SPECfp results (by far) -- look at the SPEC website
if you want to see what I mean.

Opteron has the best overall integer performance at the moment, and probably the best price/performance ratio. I believe it will thrash a Xeon on integer or FP, due to the doubling of the internal register file for both. But for max-floating-point ops per second, Itanium is still king. It's true for hspice in my line of work (which mostly consists of FP matrix math), it should hold true for you too.

I would try to get a set of eval systems from someone like HP, if I was you. They sell all 3 architectures -- tell them you will buy whichever one runs your research app the fastest and they will probably be willing to do the demo (or could get you some time ssh'd into one to at least try it out on your code).

-c

Re:Question about itanium2 - Opteron

[Psychotext]

Just as a quick reply to this. I just built a rather nice dual Opteron 248 workstation with 2gb ram, five 72gb 10k SATA raptors (Raid 0 / 5) and a Winnov Videum Duo capture card in it. It's used for video capture / editing / encoding / streaming.

Total cost, 3200GBP / 4750EUR. Could I be any happier? Not a chance, this thing has been able to handle pretty much everything I've thrown at it.

64bit AMD only benched with 32bit OS and software?

[stock]

One shouldn't compare apple with pears. So a shootout between 32bit only Xeon's and 64bit AMD's (ok which do 32bit) is a weird exercise. The testers only ran a 32bit version of Windows XP. That should be obvious. Still the Opteron 150 and 250 seem to win many shooutouts.

Robert
For real 64bit performance visit VooDoo software tuning and download the 64bit 2004 Longsword Gamez Demo. The Download of UT2004 64-bit English Linux Demo is around 200Mb.

XP-M 2500+ @ 2.4ghz?

[Anonymous Coward]

Am I the only one who finds it funny/intresting that they would think to include an XP-M overclocked to 2.4ghz in this test?

It's pretty funny that even on a benchmark like this, the mobile is known to be the best option for Athlon Barton XP's.

Anyone looking to spend $100 on a cpu the choice is clear. Pretty solid performance in comparison too. Usually fitting right in around the P4 3.4ghz level of performance. AND ONLY $300 cheaper haha.

Re:XP-M 2500+ @ 2.4ghz?

[SFBwian]

Yep. It's almost-certain overclocking abilities have something to do with the lower voltage requirements for mobile chips and the testing methods used to handpick them. TechReport did a mini-article on that too, I think.

Re:OT - WTF?

[Anonymous Coward]

Hi there

Your firewall might be utilising the so-called 'evil-bit', that marks all the Slashdot UDP packets on port 80.

To correct your problem, please talk to your network administrator to allow 'evil-bit' marked packets to go through. Of course, make sure this is enabled for Slashdot.org only - you probably don't want to receive 'evil-bit' packets from other sites.

Best Regards

A mac fanatic speaks

[Anonymous Coward]

Dude, no matter how you want to spin things. At this point in history, Intel/AMD is twice as fast as PPC.

Right across the board.

PPC is like the 68000 archticture; nice, but could never keep up with the fast-paced x86 world.

Re:The Conclusion... Pimping

[SFBwian]

I gathered that they tested on Windows 32-bit because that is the OS with the most desktop workstation user base. To compare existing products to new ones on what people actually use, and more importantly, what is actually available (have you bought your copy of Windows XP 64-bit edition yet?), you benchmark what they did. Another reason to test a 64-bit-capable CPU on a non-64-bit OS is simply because they can, as it's not limited to solely 64-bit applications.

They test on games because the benchmarks are easy for them to perform (they've been doing the same set of tests for quite a while) and because they cater mostly to a game-playing audience. AMD almost always compares favorably to Intel in game tests.

Still, I agree that it would be nice to see benchmarks of 64-bit software running on a 64-bit operating system. Is UT2kX 64-bit ready for Linux?

Re:Great, but how fast can they compile the kernel

[Anonymous Coward]

On my dual opteron 244 (2 x 1.8 GHz), compiling a 2.4.26 kernel and its modules:

$ make bzImage && make modules

takes 96 secs.

Re:Think it's time to seriously consider AMD

[haggar]

Did the c't article mention that the Pentium M was developed in Israel, or did you just know otherwise? I had the impression that the fact that the Centrino was developed in Haifa, was kept relatively secret, as Israel seems to always attract so much controversy.

But the price...

[Dezer]

Has anyone actually checked on the price? Take a gander over at http://www.amd.com/us-en/Processors/ProductInforma tion/0,,30_118_609,00.html?redir=CPT301 The new 150/250/850 models are $637/$851/$1514 comparatively. Compare that to the *48 models, which are still expensive. Does AMDs increased market share herald a a new strategy from AMD? Back "in the day" we all used to love AMDs more than Intels because of the great performance/cost ratio. I would love to have a pair of opterons, but the prices are ridiculous. I miss the old AMD...

Re:But the price...

[philthedrill]

I would love to have a pair of opterons, but the prices are ridiculous.

Well, there are a couple of factors to consider. First, AMD is the only company right now that offers 64-bit x86. Second, the price is going to be pretty high since these were just released. Models that are a couple of notches down from top-of-the-line are better values. Third, these are server chips, so you should probably be wondering when dual processor Athlon64's will be coming out.

Re:But the price...

[Illissius]

The Opteron 1xx-s cost very nearly the same as an Athlon 64 of the same speed (which in turn cost the same as a Pentium 4 with MHz equal to the A64's rating), so those are fairly priced. The 2xx-s naturally cost somewhat more, while the 8xx-s cost a /lot/ more, which is reasonable seeing as only enterprise customers would think of wanting them, and iirc they're still a lot cheaper than Xeon MPs.

Re:But the price...

[juhaz]

Well, these are not meant for you. Opteron is first and foremost a workstation/server CPU, it's obviously marketed and priced for companies.

The regular A64 is much better bang for the buck, quite competive with P4. Not to mention the "old" Athlon XP's still here and still beats the living daylights of any other CPU on price/performance ratio.

Re:But the price...

[mjuarez]

I would love to have a pair of opterons, but the prices are ridiculous. I miss the old AMD...

That's like saying you'd love to have a new BMW 545i, but only want to pay $10K for it. These are one the best price/performance chips out there. Not to mention that they can run anything you're running right now (assuming you're on an x86 machine, as 99% of the population), unlike Itanium. Oh, and don't forget the NX-bit, which will block buffer-overflow viruses, when coupled with WindowsXP SP2.

Even then, if you really want to test dual-Opteron performance, you can get a couple of 240 Opterons for under $200 each. That's very inexpensive, less than the price of a SINGLE Xeon 3.0Ghz.

Marcos

Re:But the price...

[ducomputergeek]

Opterons are designed to be a server/high end work station chip. You need to comapare its price with like typed chips like the Xeon and SPARC from SUN.

I've worked in the rendering graphics world where dropping $15k on an SGI, SUN, or ALPHA workstation in the past was nothing. The renderfarm alone was $3.2M of ALPHA servers back in the day.

Funny thing now is it was replaced last summer with $750k worth of IBM blade servers that nearly quadrupled the number of processors in half the space.

Anyway, AMD really isn't targeting gamers or the average users with these chips. If you want to compare price/performance, need to take the Athlon* series vs. the P4's.

Re:Think it's time to seriously consider AMD

[Anonymous Coward]

frozenray writes:

I'd rather have silent systems that do not overload the air conditioning with enormous amounts of heat

To add some context, a typical very cheap Home Depot low end window air-conditioner (the kind that sell for under $100) is typically rated at about 5000 to 6000 BTUs. A processor dissipating 100 Watts requries about 341 BTU/hour in cooling.

So you would need to be running a rack of 18 processors dissipating 100 Watts per processor to max out a cheap window air conditioner (not taking into account disk drive cooling requirements). Given a typical 15 or 20 Amp 120 volt mains circuit, the rack and AC would have to be on their own separate circuits. And the total power consumed is 1800 * 2 = 3600 Watts.

As you can see, a couple of workstations alone would not put too much of a load on your air conditioning, but a server farm on the other hand . . .

Exactly.

[Cyno01]

If you need the cooling and are overclocking or whatever you should lap your heatsink to a mirror ffinish, and if possible the proceessor too. Your correct, thermal compound is only there to fill in microscopic imperfections. Check out this for an interesting comparison of thermal compund effectivness.

Lots of performance variables..

[-tji]

The board they used only had memory off of one of the CPU's in the dual Opteron systems. I wonder how much this effected performance in the compute intensive benchmarks, or even memory bandwidth benchmarks.

A benchmark with a Quad Opteron, like the Tyan Thunder K8QS would be interesting. It has memory hanging off of each of the four CPU's. (Which opens a lot of questions about how that memory is managed.. Is there some sort of memory affinity per processor? What is the performance hit if one CPU needs memory off another?)

Also, you have the 32 bit vs 64 bit stuff. It would be interesting to compare the best 32 bit optimized app against a 64 bit optimized version. Maybe something like MPEG2 compression of an HD stream.

Re:Lots of performance variables..

[joib]

Which opens a lot of questions about how that memory is managed.. Is there some sort of memory affinity per processor?


It's called a NUMA. Google for the term and ye shall find.

The memory manager of the kernel has to take NUMA into account, or performance will suck.

Re:Lots of performance variables..

[tiptone]

buried all the way down on page 2:

"The Thunder K8W showed us its eye-popping memory bandwidth potential in our recent Opteron workstation motherboard round-up, but it was only able to realize that potential with the 64-bit beta of Windows XP. Right now, there is no workstation-class version of Windows available, outside of early beta versions, that understands the non-uniform memory access (NUMA) configuration of Opteron systems, so much of the K8W's memory bandwidth goes to waste. This reality, combined with the fact that the K8W doesn't tolerate aggressive memory timings well, caused the Thunder K8W to lose out to the K8T Master2 in many of our performance tests. So I decided to go with the K8T Master2 for our purposes."

Re:Lots of performance variables..

[-tji]

But, it's not a typical NUMA architecture, is it?

I think of NUMA more like the BBN Butterfly I worked on in college, where many CPU boards are connected by a relatively slow bus, and each CPU board has its own locally addressed memory. So, each CPU is a node, and for any decent performance it must use its own local memory.

In the Opteron case, the memory is still relatively local, and based on the benchmarks in the article the performance hit for accessing another CPU's memory is not huge. In general, I think these systems are treated as SMP, with one large memory space. My question is how difficult is a memory affinity implementation, and is it worth the overhead/complexity?

Re:Lots of performance variables..

[joib]

But, it's not a typical NUMA architecture, is it?


I'm no expert on this, but I guess you're right.


In the Opteron case, the memory is still relatively local, and based on the benchmarks in the article the performance hit for accessing another CPU's memory is not huge.


Remember that the Opteron has an on-chip memory manager (MMU). Consider a system with two cpus, CPU#0 and CPU#1. The architecture, AFAIK, is that each CPU has one HyperTransport link to its own memory, and another HyperTransport link to the other CPU. So, if CPU#0 finds that it needs to access memory local to CPU#1 it needs to go through

CPU#0 -> MMU#0 -> HyperTransport -> MMU#1 -> HyperTransport -> Memory

instead of the direct route which is

CPU#0 -> MMU#0 -> HyperTransport -> Memory

This will certainly increase latency as well as reducing the memory bandwidth available to CPU#1 (since CPU#0 is also using MMU#1).


In general, I think these systems are treated as SMP, with one large memory space.


Well, having a shared memory is the basic idea behind using a NUMA in the first place..


My question is how difficult is a memory affinity implementation, and is it worth the overhead/complexity?


Linux, at least, already has NUMA support, originally for the big SGI machines. So the "complexity price" has already been paid. Obviously, cycles are used executing the NUMA logic in the kernel (when NUMA support is enabled, that is), but I guess that overhead is vanishingly small compared to the overhead of accessing potentially Gigabytes of non-local memory.

Re:Lots of performance variables..

[RzUpAnmsCwrds]

"CPU#0 -> MMU#0 -> HyperTransport -> Memory"

Not quite.

MC = Memory Controller

Think CPU0 > FSB0 > MC0 > DDR

This is the same path as any system with a northbridge, except that the FSB runs at the same clock as the CPU, and is physically much shorter.

Connecting to another CPU is as follows:

MC = Memory/HyperTransport Controller
HT = HyperTransport

CPU0 > FSB0 > MC0 > HT > MC1 > DDR

Not as low-latency as a typical northbridge arrangement, but not bad.

Remember that memory bandwidth scales as you add more CPUs in an Opteron system. The HyperTransport link will eventually become a limiting factor, so it is critical to have an OS that knows the difference between "near" and "far" memory.

Re:Think it's time to seriously consider AMD

[toddestan]

Maybe he was refering to the K5?

Re:AMD is back

[Anonymous Coward]

AMD obviously understands the value of taking in technical people. I wonder if they will take advantage of their relationship with Sun (or Sun with AMD's Operteron) to learn techniques that the Sun SPARC developers are working with.

AMD seems to be positioning itself well.

Power, Heat, Noise

[timeOday]

I wish reviewers would start including a section on how much power the systems take. I'd like to replace my home server box and would like to minimze power consumption since it runs 24/7. I'd also like to replace my 'desktop' PC and would like to minimize fans because I like to listen to music on it.

Re:Power, Heat, Noise

[alienw]

I have a much lower-end Opteron 140 in my box, and for all I know, it runs about 50% cooler than a comparable Athlon XP. I wouldn't worry too much about cooling them, just don't go for the super-high-end stuff. If you are looking for low power consumption, get the slowest chip that's made with the smallest process size.

Re:Power, Heat, Noise

[Illissius]

Here's the lowdown: Athlon 64s and Pentium 4 C (Northwood) processors are comparable in power consumption (or heat dissipation? one of the two, but they are rather closely related), around 80-90W iirc. The newer Pentium 4 E (Prescott) processors consume rather more, over 100W. So there's that.

Re:Power, Heat, Noise

[Anonymous Coward]

I have found that the ThermalTake Xaser III case to be very quiet while still cooling very well. It keeps my P4 3.2GHz cool and is quiet enough that the hard drive access is the loudest noise coming from the case. WD SATA 160GB drives, not 20MB RLL full heights :)

Apparently my karma ran over my karma.

Re:Power, Heat, Noise

[timeOday]

I have found that the ThermalTake Xaser III case to be very quiet while still cooling very well.

Holy cow those look nice... and expensive! (Couldn't find a price list, but it's pretty obvious).

Re:Think it's time to seriously consider AMD

[frozenray]

Here's an online version of the c't article I mentioned (sans pictures). Quoting from it:

"Definitiv bestätigt hat Intel jedoch nur, dass die Entwicklung des geplanten Prescott-Nachfolgers mit Codenamen Tejas sowie seines Workstation-Kollegen Jawhawk eingestellt wurde. Stattdessen soll ein echter Doppelprozessor, also ein Prozessor mit zwei physischen Kernen auf dem Chip, im nächsten Jahr die Desktops bevölkern. Allerdings wollten die Kalifornier noch nicht zugeben, was alle Internet-Spatzen von den Websites zwitschern, nämlich dass es sich hierbei nicht um einen Nachfahr der in Oregon entwickelten Pentium-4-Linie, sondern um einen Spross aus der israelischen Design-Schule in Haifa handeln soll."

Rough translation (excuse my English):

"Intel has only acknowledged that development of the Prescott successor Tejas and its workstation-brethren Jayhawk has been discontinued. Instead, a true dual processor - a processor with two physical cores on the chip - will populate desktop PCs next year. The californians were reluctant to admit what many are speculating about - namely, that this probably won't be a descendant of the Pentium-4 line developed in Oregon, but a child of the israelian design school in Haifa."

Further down in the article they mention Pentium-M designer Shmuel "Mooly" Eden, who has been transferred to Oregon some time ago.

Re:Think it's time to seriously consider AMD

[daniel23]

The article mentioned it and it was no news for any regular reader of that magazine.

There seems to be a consensus, at least among those with a technical interest that the quality of many Israelian products is not affected by controversial aspects of what religious fundamentalists, narrowminded politicians, government and military do.

And the same is true for products of other countries that always attract so much controversy, like i.e the US of A.

Re:AMD is back

[ckaminski]

I imagine they're not going to have much of a choice if Sun does decide to move to Opteron over the next 5-7 years. With no more Ultrasparc V coming, it's common guess/knowledge that the multicore Ultra IV's are the end of the road for Sparc.

Re:Think it's time to seriously consider AMD

[enigmals1]

Ah, yeah, that would make more sense then. The K5 was the only crap chip line AMD ever made cuz it was inbetween their 486 line (which was basically the same since they helped develope the real 486 for Intel) and when they totally revamped for their killer K6.

Re:Think it's time to seriously consider AMD

[robnauta]

Um... HUH?? The K6-2 and especially later the K6-3 ran RINGS around the same speed Pentium and P-II chips of the day?! What the heck are you talking about?!

Well maybe the K6-2 450 did, but by then super 7 boards like the Asus P5A-B were already disappearing from stores. And it wasn't overclock friendly, a 450 would more often fail than succeed to run at 500. The K6-3 was better, but even more on the edge, and was just too expensive. Sure, the K6-2+ was a whole lot better, but it was way too late, and much too rare. It was nearly impossible to buy one of those.

Re:The Conclusion... Pimping

[SFBwian]

Sounds to me like it's more the case that the article in question didn't pertain to your specific wants in a new processor article. It doesn't seem like the submitter hid the intents of the article:

Even if you have no interest in AMD's latest workstation chips, the review is worth checking out to see how two dozen of the fastest workstation and PC processors stack up in rendering, scientific computing, speech recognition, and even gaming tests."

In fact, nowhere do I see the implication that this would be a suite of tests regarding the Opteron's capability as a server processor. To quote the article itself:

First and foremost, we tested the Opteron 150 and 250 as workstation processors, not as server chips. Perhaps next time out we'll consider doing a suite of server-oriented benchmarks, but PC-based workstations are a more common part of our coverage around here.

Overall, I just don't think that you're the audience they intend to read the article. Still, you're not all Slashdotters, so I would assume (as the submitter probably did) that some people might benefit from it anyway. Hence, on Slashdot.

Who knows? If I was into gaming, I'd be following the gamers sites, not reading Slashdot.

No, you wouldn't, because gaming sites don't do comprehensive benchmarks of hardware on multiple processors and video cards. They do game reviews. If you're wondering which new processor or video card is going to give you the most bang for your buck on a game you are already planning to buy (or already have), that doesn't help much.

And if I'm not mistaken, Slashdot has a games section. I could say the same thing about music (re: every single iTunes- and Rio-oriented article). Slashdot is not limited to just server administrators and programmers (whether or not this is a bad thing in the first place, isn't the point). So, if an article doesn't cater to some people, is it really fair to bitch and moan that it doesn't do that for niche X?

Finally (and back to the main topic), TechReport is an enthusiast site. It doesn't handle every practice that products could be intended for, and doesn't handle all products for a given practice. Take it with a grain of salt.

Re:Think it's time to seriously consider AMD

[enigmals1]

Well, gee so it didn't overclock (which btw I got 550 out of my 450 *shrug*)... but to say it was a "God aweful CPU" is really ignorant!

but that's just me.

Re:Great, but how fast can they compile the kernel

[ckaminski]

Sigh...

I remember the days when I could at least drink a good cup of coffee and catch up with the local newspaper while waiting for my kernel compile to finish...

Sigh...

So does this mean

[gnu-sucks]

...that it supports WiFi now?

I'm so confused...

Re:So does this mean

[Anonymous Coward]

...that it supports WiFi now?
I'm so confused...

you sure are...

Re:The Conclusion... Pimping

[cixelsyd]

You know you can compile with GCC and tell it use BOTH the 387 FPU and the SIMD units? Is that what happened? Or was it only using one set the whole time in both cases? You can use both the FPU and SIMD at the same time? Last thing I heard, any sort of SIMD instructions used the FPU registers, thus making it impossible to use both simultaneously. If I'm wrong (all I'm really familiar with is MMX, which is kind of old at this point), please correct me, because that sounds like it could definitely come in handy in some circumstances. Let me know.

AMD also climbing back regarding total Sales

[pillageplunder]

Article from Businessweek http://www.businessweek.com/technology/content/may 2004/tc20040519_3643_tc024.htm Points out that AMD is regaining market share. Nice to see. It helps that HP is an AMD shop. Also points out AMD 64 bit chip has the gamers all agog, and Intel so far with nothing to compare.

Go back...

[Kjella]

...and read some of the papers on x86-64. AMD has a lot more than 16 registers *internally*. But it turned out the performance got WORSE when they were exposed to the compiler, instead of managed internally. If they can't even manage such a trivial change well, it's likely the RISC compilers would do worse than a CISC-RISC decoder stage.

If you want to make a computer performing anything close to modern standards, you're going to have to deal with interdependency of the RISC instructions anyway (pipelining, hyperthreading, multiple cores etc.) Don't you think Intel or AMD would provide a "native" interface if the decoder stage was really holding them back?

In short, I'm sure the engineers at AMD and Intel have picked apart x86 code and said "With perfect compilation to our internal structure, how much faster would it be?" and found that it simply isn't the way you describe it.

Kjella

Re:Go back...

[Anonymous Coward]

..and read some of the papers on x86-64.

Care to recommend a good starting point?

But it turned out the performance got WORSE when they were exposed to the compiler, instead of managed internally.

Which compiler? The whole idea of RISC architecture is to shift the complexity from the chip to an optimized compiler. If the compiler they were using was stinko, then of course they got worse performance.

Re:Go back...

[Anonymous Coward]

> Which compiler? The whole idea of RISC architecture is to shift the complexity from the chip to an optimized compiler. If the compiler they were using was stinko, then of course they got worse performance.

Risc instructions are longer, so you easily become memory-bound.

CISC can be thought of compressed-RISC

Re:Go back...

[Anonymous Coward]

Risc instructions are longer, so you easily become memory-bound.

Which is why Intel went CISC in the first place: because memory was hella expensive back then. It's not now.

Re:Go back...

[Anonymous Coward]

> Which is why Intel went CISC in the first place: because memory was hella expensive back then. It's not now.

Yes. But memory is slooow. By memory-bound I meant bound to the speed of memory access.

Which is sloooow.

So, if your on-die cache is fully used, you RISC code will start beeing slower than the CISC code, because the processor will have to access memory to fecth instrructions.

Re:Think it's time to seriously consider AMD

[juhaz]

K6-2 was pretty fast in integer math but it had a very lousy FPU.

It was faster than P2 in some things, but due to that FPU, even Celeron badly beat it in the one area that values speeds over anything - games.

K6-3 was fast, but they never managed to run it beyond 450MHz, and even that was too late.

And Pentium wasn't "same day", but previous generation, so of course it was slower. Nor were there any that were same speed, the last pentium was 233MHz and K6-2 started from 300.

Actually

[Dimensio]

My HSF (which came standard with the AMD 64 processor) actually had a layer of grease on it. Not a pad, actual thermal grease. Seemed kind of thick, too.

Re:The Conclusion... Pimping

[WhiteDragon]

I was just reading this in the gcc info today (trying to discover the absolutely optimal compiler options for my box):

`-mfpmath=UNIT'
Generate floating point arithmetics for selected unit UNIT. The
choices for UNIT are:

`387'
Use the standard 387 floating point coprocessor present
majority of chips and emulated otherwise. Code compiled with
this option will run almost everywhere. The temporary
results are computed in 80bit precision instead of precision
specified by the type resulting in slightly different results
compared to most of other chips. See `-ffloat-store' for more
detailed description.

This is the default choice for i386 compiler.

`sse'
Use scalar floating point instructions present in the SSE
instruction set. This instruction set is supported by
Pentium3 and newer chips, in the AMD line by Athlon-4,
Athlon-xp and Athlon-mp chips. The earlier version of SSE
instruction set supports only single precision arithmetics,
thus the double and extended precision arithmetics is still
done using 387. Later version, present only in Pentium4 and
the future AMD x86-64 chips supports double precision
arithmetics too.

For i387 you need to use `-march=CPU-TYPE', `-msse' or
`-msse2' switches to enable SSE extensions and make this
option effective. For x86-64 compiler, these extensions are
enabled by default.

The resulting code should be considerably faster in the
majority of cases and avoid the numerical instability
problems of 387 code, but may break some existing code that
expects temporaries to be 80bit.

This is the default choice for the x86-64 compiler.

`sse,387'
Attempt to utilize both instruction sets at once. This
effectively double the amount of available registers and on
chips with separate execution units for 387 and SSE the
execution resources too. Use this option with care, as it is
still experimental, because the gcc register allocator does
not model separate functional units well.

So it looks like you can use the FPU and the SIMD registers at the same time! I would love to see if this actually makes an improvement in the execution speed.

Re:The Conclusion... Pimping

[BiggerIsBetter]

I was thinking of the -mfpmath=sse,387 option in this instance. http://gcc.gnu.org/onlinedocs/gcc-3.4.0/gcc/i386-a nd-x86-64-Options.html#i386%20and%20x86-64%20Optio ns

Quad Opterons?

[ele7ven]

Seldom do you get to see the performance of quad opterons in benchmarks. With amd's hypertransport technology, the 800 series decimates even the newest 4mb L3 cache xeons. Perhaps, however, it's that reviewers realize they don't need to show the complete scaling potential of the opteron to make the point that it's a superior workstation cpu.

Re:Quad Opterons?

[bersl2]

Tyan's got a good-looking quad Opteron board (if only it had an AGP slot!). One of these days, I'm gonna get my hands on one of their 2P boards.

Hopefully, this announcement will drive down the price of the 246 and 248, so that 1GB RAM per proc. will cost less than $1,000...

Of course, I've considered waiting for the dual cored Opterons to come out in 2005. Then again, AFAIK the dual core should still look like a single core to the motherboard.

Gee... all this talk is just making me want all of this stuff more.

Re:The Conclusion... Pimping

[BiggerIsBetter]

Look, when the article is headed "EconolineCrush writes "AMD has added a series of Opteron x50 processors to its workstation and server line that push the K8 core up to 2.4GHz. The Tech Report has tested the latest single and dual-processor Opterons against more than 20 other processors..." there are certain expectations. Did I go in looking for something useful? Yes. Did they deliver? No. They presented a broad range of benchmarks on joe-blow hardware, with little serious analysis. A single barracuda V drive in a professional workstation, especially one that's hitting the disk like some of these tests do? Um, no. It's hardly news for nerds they got going on there. Perhaps news for consumers would be appropriate. I can see from your previous posts that you're a TechReport fanboi and that's fine, but don't try and justify their consumer level report as something useful for IT professionals on Slashdot. They ran some mainstream Windows benchmarks and produced some graphs, and mused over the results - that's all.

Marketing is wierd

[James Lewis]

According to the article, and FX-51 is the same as an Opteron 148. Looking at newegg, you can see that the Opteron 148 is $404 while the FX-51 is $689. Interestingly, you can see that the FX-51 has a LOT more reviews (and I would assume more sales) so their marketing strategy seems to be working, but I sure would feel cheated to find out I had paid ~300 more than I could have for a product.

Why should AMD have bothered with faster K6s?

[bani]

By then the Athlons were out. The profit margins on Athlons were far better, so why bother pumping money into the older designs?

No.

[StarKruzr]

Only in integer calculations, iirc. Sorry, try again.

Re:The Conclusion... Pimping

[SFBwian]

Yes, AMD has released them for those purposes. The fact that TechReport didn't test them using database query benchmarks is their perrogative. If you didn't see anything you liked on the testing methods page, you probably shouldn't have bothered reading it any more.

I can see from your previous posts that you're a TechReport fanboi and that's fine, but don't try and justify their consumer level report as something useful for IT professionals on Slashdot.

Actually, I think I was trying to point out that it's useful for non- IT professionals on Slashdot, rather than people such as yourself. Still, even in my short term experience with Slashdot itself, IT professionals seem to be only one type of Slashdot reader, among many.

I personally find TechReport useful for good first impressions of new (to me) technology, hardware, and links to the same sorts of things at other sites. Joe Blow benchmarks on typical end-user hardware are good for that. This isn't what you expected (ie, you must be a new visitor there), and I guess my suggestion to you is to either use it as it is, or just not read TechReport. You're don't seem to be particularly interested in what they have to say.

Intel is competing as best they can (ie., poorly)

[branchingfactor]

I respectfully disagree that Intel was ever competing with itself. They've been competing with AMD in the desktop/workgroup market for a long time now, and with Sparc/MIPS/Alpha in the enterprise market as well. Intel developed the high-clock rate Pentium 4 to compete directly with AMD's Athlon, after the Athlon whooped the Pentium 3. The Intel marketing people saw how much leverage AMD got from being the first to 1GHz with their Athlon and they didn't want that to happen again. Intel was *severely* embarrassed by loosing the race to 1Ghz. The Intel marketing people incorrectly concluded that the market was buying clock rate rather than performance. So they mandated a CPU that would have the highest possible clock rate, irrespective of performance. That's the P4/Netburst. Now they are getting burned on performance because AMD has shifted the dialog from clock rate to benchmarks. Intel also saw with the success of the Pentium M that benchmarks can triumph over clock rate. So now Intel has finally realized that they misread the market and they have to change their entire product strategy.

Not necessarily

[neye_eve]

IIRC, the FX-5x series is unlocked for the purposes of overclocking. Don't know if the Opterons are or not, but you know for a fact that overclocking is available for the FX series. So, maybe you're paying a bit more for this aspect of it?

neye

Re:Not necessarily

[Wesley Felter]

After I paid $700 for an Athlon 64 FX, I won't dare to burn it up by overclocking...

Re:Think it's time to seriously consider AMD

[haggar]

Thanks. I bought a copy of c't once when I visited Rheinland Pfalz, but my command of German was woefully unadequate to appreciate it. Still, I could see that it's an excellent magazine, written by people who know what the heck they're talking about.

BTW, your English is excellent.

Re:Think it's time to seriously consider AMD

[Anonymous Coward]

Speaking as a business user...

Oh, I could tell that without your help. The Athlon64 line has the beautiful Coll & Quiet technology that keeps the CPU at low MHz when the load is low. If you read a few posts up, you'll find a story abou an Athlon64 system playing a DVD move while keeping itself at the slow 800MHz and completely silent - because the chip runs so cool that all fans stop spinning at that speed. Anyway, no offence ment, but it seems, the busness users are usualy under the influance of marketing hype - which has very little to do with the present state of affairs.

It was all to do with pipelining

[Anonymous Coward]

Actually, the FPU circuitry itself was pretty powerful (as fast as P2), however the lack of pipelining was what let it down. The P2 had this.

Re:Great, but how fast can they compile the kernel

[mcpkaaos]

Well there's always the Win2K source...

It's wireless processor

[MMHere]

So it's a wireless processor, huh.

They musta replaced all those tiny little interconnects on the chip surface with billions of WiFi access points, then?

Re:AMD

[Anonymous Coward]

Thats Advanced Micro Devices

"Thats"? The plural form of "That"?

Re:Think it's time to seriously consider AMD

[sumdumass]

would a dual core proccesor count as 2 procesors like the hyperthreaded intels? if so i woulnd think they would make a quad core because of microsoft licensing. You would need a server product to run a single quad on one machine. Intel already has a server line of processors they charge way more for. maybe that were we would see it happen at.