More Cell Processor Details And First Pictures

slashflood writes "After reading two articles on slashdot about the Cell architecture and another one that criticizes the extensive roundup of the STI patents, I found the first pictures of the Cell core. It seems that at least some predictions were true. Seeing is believing." mtgarden points to this ZDNet article which says that the "first version of the chip will run at speeds faster than 4GHz. Engineers were vague on how much faster, but reports from design partners say 4.6GHz is likely. By comparison, the fastest current Pentium PC processor tops out at 3.8GHz." (More below.)

Hack Jandy writes "Anand Shimpi has some details about the upcoming Cell processor (PS3) in his personal blog. According to Anand, "Rambus announced that the new Cell processor uses both Rambus XDR memory and their FlexIO processor bus. Because Rambus designed the interface for both the memory controller(s) and the processor interface, the vast majority of signaling pins are using Rambus interfaces - a total of 90% according to Rambus." Hasn't Rambus been showing up a lot again recently? The fact that Cell uses XDR has been widely speculated, but the fact that it will also use the Rambus bus signalling is something completely new."

Comments

Pictures?

[vurg]

How about HL2 benchmarks?

Cell

[ryanmfw]

Cell processors could really dominate. With how cheap they arespeculated to be, their distributed processing, and their all around speed, the could take over a significant part of the computer marketshare. If Cell processors also have the Power4 processors in them, this could be a replacement for x86. Could be. As other articles have pointed out, x86 has had superior competition in the past, and has been able to weather it. We shall wait and see. Cheers

Re:Cell

[hattig]

From http://www.aceshardware.com/forums/read_post.jsp?i d=115121622&forumid=1

CELL is a Multi-Core Architecture
Contains 8 SPUs each containing a 128 entry 128-bit register file and 256KB Local Store
Contains 64-bit Power ArchitectureTM with VMX that is a dual thread SMT design - views system memory as a 10-way coherent threaded machine
2.5MB of on Chip memory (512KB L2 and 8 * 256KB)
234 million transistors
Prototype die size of 221mm2
Fabricated with 90nanometer (nm) SOI process technology

We're talking about a single-core POWER5 design (because of the SMT).

But 221mm^2 ... that's big, bigger than a 130nm Opteron, bigger than a dual-core 90nm Opteron. But wait for 65nm, and you've got something of a manageable size to make a cheaper console. I don't see 4 Cells in a PS3 though, not even at 65nm, unless it is going to cost a boatload. Still, Sony aren't a little company, I'm sure they could sort it out.

Still, I guess this means the next PowerMac G5 will be using processors with SMT finally.

Re:Cell

[bonch]

The Cell chip uses the Power architecture, so one wonders if Apple isn't going to ship a 3.0 Ghz G5 after all and just wait for Cells instead (4.3 Ghz dual Power Mac Cell? Geez...).

Re:Cell

[doormat]

234M transistors @ 90nm is actually about as big as most graphics processors are. They tend to be 150M-200M @ 110nm or 130nm. I dont see it being terribly difficult to fab really,

Re:Cell

[ryanmfw]

Well, it seems like it's being produced on a .3 meter process! "The firms expect to begin production of Cell processors at IBM's 300mm plant in New York and Sony's Nagasaki fab later this year." Why do I sense that the article is wrong? Maybe there is a grain of truth though, and I had heard about a 30 nm plant, but I could just be crazy. :)

Re:Cell

[Wesley Felter]

The feature sizes are 90 nm and the wafers are 300 mm in diameter.

Re:Cell

[sleepingsquirrel]

300mm is the size of the silicon wafer, not the size of anything on the chip.

Re:Cell

[nokiator]

As usual, media is making a bigger deal out of this than what it really is worth. After looking at the details in the articles linked above, Cell looks to me like a combination of two well known technologies: SIMD units integrated with a microprocessor and MIMD geometry engines that is used in all modern GPUs. STI team must have figured out that moving the geometry engines from the graphics coprocessor to the main CPU may provide performance benefits in terms of processing 3D data structures. As for the 4+ GHz clock speed, this is more likely the pipeline clock speed for the SPEs and the embedded PPC core on this device would probably run from a much slower (2.4GHz?) clock. Current Intel P4 processors use 1.5X core clock in some parts of the floating point unit, so you should consider a 3.8GHz P4 to be a "5.7GHz" chip to make a fair comparison to the speculated clock speeds for the cell chip.

Re:Cell

[Anonymous Coward]

There isn't much info on this processor yet, but from what I've heard about it, I conjecture that its design is in danger of violating Nakamura's law of quantum molecular finitism, especially as the clock speeds are increased. This could result in an asymmetric shift of the lattice substrate, in which case the transistor conductivity would actually start to skew in the direction of anticonductivity (the inverse of superconductivity), forming insulating barriers. As insulating barriers would form and more heat would be generated, unbounded oscillations the molecular level could cause regenerative superhetrodyning - a cascading effect leading to the processor eventually failing catastrophically while emitting a sound remarkably similar to the Love Boat theme. Or not.

Re:Cell

[IdleTime]

There is really no reason for Linux to use a 4.6 GHz processor though.

This is the biggest rubbish I have ever heard!

I see a gazillion areas that requires speed and processing power. Just because you don't have the need does not mean others don't.

How someone could moderate that rubbish as insightsful is a mystery!

Re:Cell

[Glonoinha]

Sure, it doesn't serve up a site or anything

Amazing how fast those i386 processors were at doing absolutely nothing at all.
Assign your Linux box a task or two and all of a sudden faster CPU's become appealing.

My C=64 was a bad motherfucker, right up until the point I wanted to do some serious number crunching on it (or play games.) The minute I decide that there's more to life than interacting with the operating system on an 80x25 character wide CUI ... corporate grade relational databases serving up data to a few dozen concurrent users for example, or multivariant calculus and diff/equations - and I'm looking for all the horsepower I can get.

Plus I bet it plays a mean game of Doom III.

Re:Cell

[Fulcrum of Evil]

Any links to back that up? The only confirmed unit loss consoles I know of are the Xbox and the dreamcast. Everything else (to my knowledge) has been profitable. I looked around and the only sites that are claiming that the PSP is sold at a loss are 1up.com and some people on the chat forums. I also found a bunch of posts claiming that Sony expects to not sell the hardware at a loss. Perhaps the initial allocation was sold cheap to create buzz?

Re:Cell

[Ohreally_factor]

How someone could moderate that rubbish as insightsful is a mystery!

I deduce that we must be on Slashdot, my dear Watson.

-- Sherlock Holmes

Re:Cell

[Will Fisher]

I'm skeptical.

My Geforce 6800GT has 220M transistors on a 130nm process, and manages no more than around 400MHz.

How on earth can a 240M transistor chip on a 90nm process achieve 4600MHz?

NOBODY has seen even a 2 fold clock speed increase in the move from 130nm to 90nm let alone 11 fold. I know that these two chips arn't exactly comparable, but 4.6GHz?

This sounds like marketing hype to me.

Re:Cell

[Breakfast Pants]

Your geforce does massive parrellel computations. At 400Mhz it is getting a lot done. You don't quite understand Mhz. Current Athlons are way under the clock rate of P4's yet offer similar performance. A P4's FP unit runs at more than 4Ghz. Modern DSP's run above 10Ghz. Clock rate is not the only factor in a chip. You say you know they aren't exactly comparable... you are completely right, except replace "exactly" with "even a little bit".

PS3

[clean_stoner]

The Cell is going to be in the PS3, so does that mean that the PS3 will be clocked at 4.6 GHz+? That seems like a big leap considering consoles are normally running a little slower than "good" computers at the time they come out.

Re:PS3

[Dormann]

2GHz when the Xbox was released? I'm impressed. The machine I was using to develop Xbox games at the time wasn't at 2.

I guess it's all going to boil down to whether your prediction is accurate about processor speeds stagnating. We have a solid 18 months or more to wait before PS3 is unveiled.

These are also early numbers. If in the coming year Sony sees that their system is going to be unusually ahead in processing power, they will likely loosen (cheapen) their manufacturing standards and clock down the chip.

Why does "18 months" sound familiar?...

Re:PS3

[AssFace]

The GHz figures mean nothing at all in terms of performance expectations unless you are comparing within the same processor family.

4GHz cell != 4GHz P4 != 4GHz Opteron != 4GHz G5

Umm... this was posted under Games?

[itistoday]

I understand the chip will be used in Playstation 3, but it will also likely be used in future Apple computers, of which, the G5 is already based on the Power architecture. Maybe IT would've been a better section to put this under?

Re:Umm... this was posted under Games?

[Fulcrum of Evil]

Nintendo is being so tight-lipped about the next-gen "Revolution" system that nobody knows what its specs will be.

How is this a surprise? nintdo never talks about what it's doing - it's like a cult or something...

We flame Intel for touting speed...

[X43B]

I'm waiting to see how much work it can actually do before making a judgement. At the least it always exciting to have another option. I wonder how difficult it will be to take advantage of the new architecture.

Speed isn't everything

[leathered]

While 4.6 GHz sounds impressive, I thought we were getting away from the notion that clock speed = performance. The Pentium 4 killed off clock speed comparisons.

I must admit the specs are impressive, but show me the benchmarks!

Re:Speed isn't everything

[MBCook]

That's true. But there are two important things here. The first is that it's at 4ghz. The P4 hasn't been able to reach that (though Intel origionally said it would happen by now). So it's all ready up there.

The second is that it's STARTING at 4ghz. It's one thing to say a chip can scale and run at some speed (again, I'm looking at you Intel), but to debut it running faster than the fastest mass produced CPU in the world is something all together different.

Cell should be quite formidable, and I think it will be quite interesting to see what comes of it. I've held the opinion for a few years that computers would move to having a couple of CPUs each running their own task (like in Cell), with one main (quite possibly slower) CPU controlling them all and running the OS (traffic cop, again like in the Cell). While the individual processing units are not general purpose (they are more vector oriented), it should still be interesting to see what comes of this. After all, most things people use high-end CPUs for are (or can be) vector ops, right? Compression, 3D, etc. Wordprocessing and spreadsheets don't tend to need much power. A large generalization, I know, but still... the introduction of the Cell (especiall the way it should be able to "group" its self with other Cell processors in your house) should prove quite interesting even if it turned out to be a failure (which I SERIOUSLY doubt.)

Re:Speed isn't everything

[TexVex]

The Pentium 4 killed off clock speed comparisons.

No, that was the Athlon.

Re:Speed isn't everything

[jc42]

I thought we were getting away from the notion that clock speed = performance.

Actually, there's a good use for such comparisons: It tells you that the writer is clueless.

I'd already read enough about the Cell to know that it's more like the PowerPC than it is like an Intel cpu. So, when I read the comparison of its supposed speed and a Pentium's, I immediately knew that the writer hadn't a clue.

Any info around about benchmarks? Those can be misleading, too, in the hands of the wrong marketer. But with enough of them, it's a lot more likely that you can glean some actual speed info.

Re:Speed isn't everything

[chrysrobyn]

While 4.6 GHz sounds impressive, I thought we were getting away from the notion that clock speed = performance. The Pentium 4 killed off clock speed comparisons.

Nobody is claiming that clock speed always equals performance, but think about it this way -- say you have data coming in at 10 GB/s. You could either have 8 wires (and buffers and processing) running at 10 GHz, 16 wires (etc.) running at 5GHz, 32 wires at 2.5GHz (etc.), you get the idea. If the Cell architecture processes data at 4GHz, the only thing we can be pretty certain of is that the pipeline is very deep. The benchmarks you want to see will very likely be very impressive. Perhaps the speed was partially dictated by wire density and transistor sizing?

Real world, though, what does this mean? This chip is due to be a game machine. Game workloads are, for the most part, very predictable. You process an entire screen of graphics in a very similar manner every time. This means that if you get the prediction models (and compiler hints) right, your actual performance will be very high. The same supposition could be made for encryption or any other bulk vector processing, with obvious strengths according to the instruction set of the processor. General workloads, however, do not do very well with deep pipelines. They tend to prefer less of a pipeline and less of a branch mispredict penalty. Cell will be great at its intended market, but you don't use a 4+GHz chip with over half the area (guessing, looking at the pictures) tuned for vector math (the APUs have been called SIMD) to take over the PC. For that, we will still have multicore x86 and PPC chips to dream about.

Re:Speed isn't everything

[Johnno74]

As the grandparent post said, MHZ != performance.
A good analogy tell computer illiterate people is MHZ is kinda like the RPM an engine will do. Higher RPM doesn't necessarily mean higher speed.

Also, its a RISC design. it may well do LESS in each clock cycle than x86.

And aren't we close to the theoretical limit transistors can switch at? If the cell processor starts at such a high clock rate it won't have as much headroom for improvement.

Re:Speed isn't everything

[marshall_j]

You are right. Check out this article

In laboratory tests, the Cell chip reached a top "clock speed" of 4GHz, which means it can perform more than four billion calculations per second. By comparison, the fastest Intel Pentium chip is currently capable of 3.8GHz.

This difference in basic speed is not large but Richard Doherty, director of the computer industry analysts Envisioneering, in San Francisco, says Cell's modular architecture will give it a more substantial edge for many applications.

"At first blush I think it's safe to say that it will be 10 to 20 times faster than the fastest graphics cards and processors," Doherty told New Scientist. "We think it is going to revolutionise computer science for entertainment and business."

Re:Speed isn't everything

[getch();]

Here's what this 4.6GHz number tells me. First, it tells me that either the presenter at ISSCC was ridiculously vague or that the journalist is an idiot. Call me cynical, but I doubt that even the mighty Sony has been able to clock a supposed POWER4 or POWER5 core to around double its previous frequency. So it could be a new design. If this is the case, the clockspeed tells me that the core is either extremely simple or has more pipeline stages than Prescott. We've been through this before, and that wouldn't be good. For the record, I kind of doubt that scenario is accurate.

Last I heard, the 4.6GHz number was actually the tested clock frequency of the SRAM on the chip. That's impressive and all, but it hardly begins to indicate performance of the SRAM itself. For all we know, it could run at 4.6GHz but only with 20 cycles of latency.

The short version? We need more details. Try not to get caught up in the hype machine for once.

Re:Speed isn't everything

[Prehensile Interacti]

Actually this is initially designed for Sony's PlayStation 3.

Games are inherantly very parallel.

• Loads of chracters
• Loads of animations
• Loads of discreet AIs
• Loads of polygons
• Loads of lights
• Loads of sounds

The amount of interaction between individual entities in a game world is very low, and most of a game frame is spent shovelling data asafp to the screen. Once you are in your shovelling phase, then the parallelism will be completely maxed out.

There are some of the smartest programmers around making games. Those who got over the initial pain of the Ps2's 3 core architecture should find it relatively easy to scale up. What is most exciting this time is that the 8 cores appear to be identical, meaning that there will be less restrictions about what you use each for.

The o.p. was scoffing at a 4.6Ghz spec. Whilst maybe overstating the Cell a little with my reply, the escense is that he was an order of magnitude out in his understanding.

Re:Speed isn't everything

[drmerope]

Indeed. Even in a slow 0.18um technology, I can easily make an 8 GHz 3-inverter oscillator ring. So what?

The "chip frequency" is determined by
1) how fast can the transistors switch
2) how many FIO4 inverter equivalents (standard measure of logic complexity) there are between the latches.

#1 is just a process technology attribute

#2 is where all the magic is because it is "how much work can take place in one cycle"

#2 is commonly reduced in a technique called pipelining.

General rule: Pipelining increases throughput at the cost of latency.

Branches especially, but in other situations as well: latency becomes a limiting factor

When this happens trading against latency is a bad decision.

For any given ISA you're likely to reach this break point *somewhere*. The i386 architecture has reached it. This is because of the latency of decoding the _complex_ instructions.

A simplier instruction set => incurs less latency penalty => can be pipelined further => can achieve higher clock speeds and accrue performance benefits to additional pipelining.

Intel, though, still has probably the best process technology in the world and as a consequence if Intel were manufacturing these cell processors they'd run even faster.

But simplier instructions tend to do less work. This means you need more instructions for the same task. More instructions might code to larger memory footprints. Larger memory footprints require faster i/o to memory and larger caches to not incur performance penalties. Thus in the end you might gain nothing.

You can see this effect within amd64. Running in 64-bit mode gives you more registers, more registers should mean faster programs, but moving around all those 64-bit variables erases the benefit. (at least in compiler run-time benchmarks that I've seen).

Re:Unsure

[Anonymous Coward]

"Nucular". It's pronounced "nucular".

joint venture

[LittleGuernica]

I believe Sony and IBM and Toshiba are going to produce this thing as a joint venture, calling it "Cyberdyne" also naming the PS3 online game network Skynet, sounds promising...

Hot

[porksickle]

I don't think the final PS3 part will be clocked much higher than 3.5GHz. Otherwise it would probably involve downclocking parts of the CPU to maintain a sane thermal profile, thus making overall performance rather unpredictable. This would especially impact games, where it's all about sustainable framerates at 100% CPU utilization.

Ideal Linux chip.

[freemacmini]

If IBM can produce these things in enough volume this could be the ideal linux platform for the future.

PS3 is expected to sell very well so the chip production might be soaked up by the game consoles but you never know.

I bet apple engineers are salivating right now too.

Promises to be interesting for intel and AMD next year.

Some specs from Sony press material

[Anonymous Coward]

http://www.scee.presscentre.com/imagelibrary/detai l.asp?MediaDetailsID=25555
:

CELL...bringing supercomputer power to everyday life with latest technology optimized for compute-intensive and broadband rich media applications

SUMMARY:

Cell is a breakthrough architectural design -- featuring 8 Synergistic Processing Units (SPU) with Power-based core, with top clock speeds exceeding 4 GHz (as measured during initial laboratory testing).

Cell is OS neutral - supporting multiple operating systems simultaneously

Cell is a multicore chip comprising 8 SPUs and a 64-bit Power processor core capable of massive floating point processing

Special circuit techniques, rules for modularity and reuse, customized clocking structures, and unique power and thermal management concepts were applied to optimize the design

CELL is a Multi-Core Architecture

Contains 8 SPUs each containing a 128 entry 128-bit register file and 256KB Local Store

Contains 64-bit Power ArchitectureTM with VMX that is a dual thread SMT design - views system memory as a 10-way coherent threaded machine

2.5MB of on Chip memory (512KB L2 and 8 * 256KB)

234 million transistors

Prototype die size of 221mm2

Fabricated with 90nanometer (nm) SOI process technology

Cell is a modular architecture and floating point calculation capabilities can be adjusted by increasing or reducing the number of SPUs

CELL is a Broadband Architecture

Compatible with 64b Power Architecture(TM)

SPU is a RISC architecture with SIMD organization and Local Store

128+ concurrent transactions to memory per processor

High speed internal element interconnect bus performing at 96B/cycle

CELL is a Real-Time Architecture

Resource allocation (for Bandwidth Management)

Locking caches (via Replacement Management Tables)

Virtualization support with real time response characteristics across multiple operating systems running simultaneously

CELL is Security Enabled Architecture

SPUs dynamically configurable as secure processors for flexible security programming

CELL is a Confluence of New Technologies

Virtualization techniques to support conventional and real time applications

Autonomic power management features

Resource management for real time human interaction

Smart memory flow controllers (DMA) to sustain bandwidth

Re:Some specs from Sony press material

[Sunspire]

Warning: Pregnant women, the elderly, and children should avoid prolonged exposure to CELL.
Caution: CELL may suddenly accelerate to dangerous speeds.
CELL contains a liquid core, which if exposed due to rupture should not be touched, inhaled, or looked at.
Do not use CELL on concrete.
Discontinue use of CELL if any of the following occurs:
* Itching
* Vertigo
* Dizziness
* Tingling in extremities
* Loss of balance or coordination
* Slurred speech
* Temporary blindness
* Profuse Sweating
or
* Heart palpitations

If CELL begins to smoke, get away immediately. Seek shelter and cover head.
CELL may stick to certain types of skin.
When not in use, CELL should be returned to its special container and kept under refrigeration.
Failure to do so relieves the makers of CELL, Sony Incorporated of any and all liability.
Ingredients of CELL include an unknown glowing substance which fell to Earth, presumably from outer space.
CELL has been shipped to our troops in Saudi Arabia and is also being dropped by our warplanes on Iraq.

Do not taunt CELL.
CELL comes with a lifetime guarantee.
CELL! Accept no substitutes!

Re:Some specs from Sony press material

[gfody]

CELL is a Real-Time Architecture
CELL is a Confluence of New Technologies

sounds like someone was playing with their execuspeak magnets

Re:Xbox

[demonic-halo]

I think more likely, Microsoft will just end up putting in more Cells in their next XBox if the PS3 proves successful.

Re:Xbox

[Thu25245]

Thing is, the next Xbox will be using a PowerPC 970. So it will share a common ancestor (POWER) with the Cell.

I wonder, how compatible are the two CPUs' instruction sets? Will Microsoft be able to drop a Cell into a future revision of the Xbox2 and maintain backward compatibility? Could someone theoretically hack a PlayStation3 to run Xbox2 games?

How they got the die photos

[__aadkms7016]

They zoomed in on this press photo of an engineer holding a die.

Re:Rambus kills cell...

[ErikTheRed]

So this will just be like the last time Rambus had their hooks into a product, it will die a very expensive and slow death.

We'll see. IBM has historically been very smart (and sometimes downright ruthless) when it comes intellectual property issues. Their IP attorneys aren't referred to as "The Nazgul" for nothing...

Re:Rambus kills cell...

[jdray]

No chance that Rambus learned a lesson, then?

The Sony hype machine strikes again

[Laconian]

Remember how the Emotion Engine worked us all into a lather five years ago? And when it came out, it was just merely competitive with contemporary processors? Sony is great at churning out nerd fetish tech, but they have a terrible track record of living up to their promises. Let's hope it's different this time.

Cell processor planned to be inexpensive

[Anonymous Coward]

My friend just called me from the ISSCC. He got a couple more bits of info, including that STI plan to recoup their R&D expenses largely from other consumer multimedia devices and NOT from selling Cell processors or Cell processor based computers, meaning they will be surprisingly inexpensive. Yeah!!!

windows..

[mottie]

with IBM is pushing linux, I can't see microsoft ditching their good buddy Intel, and throwing money at IBM by porting windows to run on the Cell processor. I would guess that this would allow Intel to retain their market share, even if the Cell is infact a far superior processor.

RTFA

[temojen]

The Cell CPU has a POWER Processor with VMX (it's vector based), plus 8 stream processors (which kick ass on vector processing units for some applications). So you've got

• a regular CPU (good for program flow/logic and interdependant operations),
• a vector unit (good for large arrays with no conditionals),
• and 8 stream processors (good for applying the same operations plus flow control to lots of independant chunks of data).

w00t!

Re:by comparison...

[rco3]

what does your oscilloscope need a D/A converter for? Do you mean an A/D converter? And why 1,024 bits? That's 128 channels worth of 8-bit A/D.

What scope is this?

Conspiracy Theory

[Sophrosyne]

fact #1 Apple and Sony have been awfully close for the past few years- with some dialogue between the two CEOs.
fact #2 Apple has signed up to display at E3 this year- but hasn't published any official info on their site.
fact #3 The Mac is somewhat deficient when it comes to gaming when compared to the Windows PC.
So my speculation is that it is possible that Apple intends to build a new Mac aimed at the gaming market that will be compatible and play Sony's PS3 games- Apple in turn could publish games for the PS3.

Re:Conspiracy Theory

[Sophrosyne]

Here is a link to the Apple E3 Article
http://www.thinksecret.com/news/0502briefly.html
Also if you remember Sony recently admitted they made a mistake with their new walkman- and you also have to take into account Japanese culture and the concept of competition are not always thought of in the same respect- especially when Apple dominates the Japanese computer market (and now mp3 market).

Re:Conspiracy Theory

[Queer Boy]

So my speculation is that it is possible that Apple intends to build a new Mac aimed at the gaming market that will be compatible and play Sony's PS3 games- Apple in turn could publish games for the PS3.

Or it's possible that Apple is writing the OS for the PlayStation3.

The overwhelming majority of people do not play games on computers nor do they want to. The living room is where entertainment is king. The sheer horde of developers for consoles compared to the paltry handful for PCs should be a clue as to where the money is.

Apple's connection to the Cell processor

[bonch]

Apple's Connection to the Cell Processor

Power consumption

[Anonymous Coward]

For those of you wondering about the power consumption of this thing, perhaps you should note that Sony just licensed LongRun2 from Transmeta. It is a dynamic solution for power consumption and leakage that will probably end up in the 65nm versions coming out next year. google transmeta sony for more.

Once touted as the Intel killer, perhaps Transmeta will finally have its day.

Re:I don't get it

[gbulmash]

This seems good, but what exactly can I do with a cell processor other than play games with better graphics? It seems like the vast majority of people don't use even half of the power their computers have today, and if there are bottlenecks in todays computers it is because of RAM and the OS and not because of the CPU. Other then games, when will I be able to do other than maybe look for aliens faster.

"If you build it, he will come."

If you create a machine so powerful that there's nothing that fully utilizes its capacities, that merely spurs all sorts of geeks to dream about how they can push that machine to its limits, then overclock it, then put it all in a case made of Legos.

- Greg

Re:But flaming Intel is fun!

[Sycraft-fu]

It is, and receantly with developments in chip design and compiler design, the architecture of a chip has become much less of a big deal.

Back in the day, RISC was important because it allowed pipelining, the ability for a chip to be doing multiple things at once. Like old MIPS chips used to have 8 parallel piplines that took 8 cycles to execute an instruction, giving an effective rate of one instruction per cycle. Couldn't do that with CISC. Well now processors are decoupled from their ISAs. Each of those instructions is translated into a number of micro operations, which are actually what get handled by the processing section. Likewise it means there can be more registers than are exposed by the ISA.

The upshot is that it doesn't matter as much it used to.

However, there are still plenty of people who like to villify Intel for sticking with x86. They declare it to be an olde kludge of an architecture that needs to die and makes things all slow. However when AMD decided to stick with it, rather than hop on the EPIC bandwagon, they are suddenly heros for maintaining backwards compatibility, which is the whole reason Intel has stuck with x86 for so long.

What's I'm pointing out is the bashing is done against Intel, regardless of what they do. Intel is in the "bad" position, no matter what that is. Like with the cell chips and speed. Slasdotters have been long raging on Intel for making a design that has higher MHz but less performance per MHz (as opposed to AMD). They declare it to be a marketing gimick, etc. Now here we have an article talking about cell chips that are designed to cycle even faster, and taking shots at how slow Intel chips cycle by comparison.

It's not that these people actually have good reasons to like or dislike the decisions, they just dislike Intel and so slam on them.

Unlikely.

[katharsis83]

"plan to recoup their R&D expenses largely from other consumer multimedia devices and NOT from selling Cell processors or Cell processor based computers, meaning they will be surprisingly inexpensive. Yeah!!!"

However, from the press release:
Prototype die size of 221mm2

When it comes to chip manufacturing, the cost of a chip is basically a direct function of the area. A 221 mm^2 chip size is pretty damn big; this thing isn't going to be cheap. Even considering IBM's extensive fabrication experience, Sony will probably have to sell this at a significant loss to make the PS3 palatable to gamers.

Granted, this is a prototype, so they can probably shrink it further by production, but it still won't be something cheap. Don't count on being able to buy these cheaply to make your own parallel supercomputer.

Re:Unlikely.

[Locke2005]

Pardon my naivete, but if they go from a 90nm process to a 60nm process for actual production, shouldn't that make this a ~150mm~2 chip size? And isn't cost really a function of yields (which go down with increasing area), not "a direct function of area"? We have yet to see what kind of yields IBM can achieve with the final process -- until then, nobody can really speculate on cost.

Re:what's funny is..

[be-fan]

Prescott has 125M transistors, while the GeForce 6800 has 222M transistors. And on a tangent: this is typical Slashdot. IBM and Sony announce a 256 gigaflop chip, and Slashdotters' first reaction is to bitch about how hot and noisy it will be! Where are the real nerds in the audience?

Dont jump the gun...

[SteveXE]

Before everyone starts having digital orgasms over this chip we should take a sit back and watch approach. This all sounds amazing on paper as did PS2 and look how that turned out in terms of hardware power.

We have no idea if developers will be able to easily adapt and get any real performance out of this thing above and beyond what they get from CPU's now. Almost nobody uses the vector units in PS2, who says they will start now? In terms of just gaming I wanna see some games and examples of this thing running in real time before i start taking my wallet out of my pocket, Sony burned me last time with underpowered bug ridden hardware, ill be damned if i let them do it again.

Re:ANY ___FACTS___ AT ALL??

[be-fan]

Did you RTFA? From the second article:

Die size: 221mm^2
Transistor count: 234m
SPE Size: 2.5x5.81mm
SPE Interconnect: 4x128bit ring bus
SPE local memory: 256KB
SPE decode rate: 2 insns/cycle
SPE resources: 7 execution units (unspecified type)

They also mention the core voltage of the CPU (1.3V), the fact that the memory has been tested to 5.4GHz, detail the temperature monitoring scheme, and the fact that the SPEs are in-order chips. This is all new information.

Re:I wonder....

[cosmo7]

I wonder what M$ has to beat back a server processor with essentially hyper threading, running at 4.6 ghz, attached to 8 vector processors, each with a lot of registers and cache, which are using extremely fast memory, that can connect to other, similar processors nearby.

Microsoft has consistently overwhelmed the fastest processors on the market and I am confident that with the right bloatware they will continue to do so.

Re:Cell Processor enhances cross-platform software

[action789]

I'd be far more worried about malcode (virii, worms, etc) taking hold in the cross-platform evironment the parent mentions than worrying about games.

Missing the point

[egrinake]

There seems to be alot of confusion surrounding the Cell chip. This is not "just another processor", and it certainly has little to do with clock frequencies - the Cell is a whole new architecture, which might just be a glimpse into the future of computing.

To begin with, it might be useful with some background on the ps2 architecture - there are a couple of really great in-depth articles at Ars Technica; Sound and Vision: A Technical Overview of the Emotion Engine and The PlayStation2 vs. the PC: a system-level comparison of two 3D platforms.

What made the ps2 so awesome was that it was custom-built specifically for multimedia-processing, which requires completely different processing environments than general-purpose computing. Normal PCs are made for computing where you have a large number of instructions working on a small data-set (such as a spreadsheet) - this requires large data-caches close to the CPU, while instructions are streamed continually from RAM. Media-processing is the other way around; you have "simple" operations (like doing the calculations for a single pixel), which are run on a large set of data - so you wouldn't really need any data-caches. The ps2 did exactly this; it removed almost all the caches (only a few tiny ones were left), but it had a totally insane bus bandwidth. To borrow an analogy from the mentioned Ars Technica article:

"Here's a goofy example to help you visualize what I'm talking about: imagine a series of large buckets, connected by pipes to a main tank, with a cow lapping water out of each bucket. Since cows don't drink too fast, the pipes don't have to be too large to keep the buckets full and the cows happy. Now imagine that same setup, except with elephants on the other end instead of cows. The elephants are sucking water out so fast that you've got to do something drastic to keep them happy. One option would be to enlarge the pipes just a little (*cough* AGP *cough*), and stick insanely large buckets on the ends of them (*cough* 64MB GeForce *cough*). You then fill the buckets up to the top every morning, leave the water on all day, and pray to God that the elephants don't get too thirsty. This only works to a certain extent though, because a really thirsty elephant would still end up draining the bucket faster than you can fill it. And what happens when the elephants have kids, and the kids are even thirstier? You're only delaying the inevitable with this solution, because the problem isn't with the buckets, it's with the pipes (assuming an infinite supply of water). A better approach would be to just ditch the buckets altogether and make the pipes really, really large. You'd also want to stick some pans on the ends of the pipes as a place to collect the water before it gets consumed, but the pans don't have to be that big because the water isn't staying in them very long."

So, what does this have to do with the Cell? The Cell takes this concept even further. Cell systems are made up of multiple processors, called APUs (Attached Processing Units), which are connected using an insanely fast data bus. Each APU can be programmed to handle one specific task, and then pass the data on to the next APU for a different task. By doing this, you can just put in more processors to increase the throughput of the system. This works especially good for multimedia processing, which can be pipelined like this pretty easily. Here are a couple of snippets from the Wikipedia entry:

"While the Cell chip can have a number of different configurations, the workstation and PlayStation 3 version of Cell consists of one "Processing Element" ("PE"), and eight "Attached Processing Units" ("APU"). The PE is based on the POWER Architecture, basis of their existing POWER line and related to the PowerPC used by Apple

Re:Missing the point

[X]

I'm not sure that this makes for the "extreme goodness" that people are envisioning. It should be truly awesome for SIMD type operations, such as video encoding/decoding and 3D rendering. But I don't see much of a break through here in more general compute tasks. If you've worked with an Itanium, you know the parallelism limits you hit with VLIW instruction sets and having a bunch of VLIW processing units is just going to make it worse.

All in all, this thing strikes me as more of a next-generation DSP rather than a next-generation CPU, with a lot of hype thrown in (btw, the are apparently now called "synergistic processor elements" instead of "attached processing units" ;-).

I did, I'm still confused

[mcc]

Hi.. so I am trying to take all of this in. Please help me understand. I am a Mac programmer and I have a relatively good understanding of what's happening in the PowerPC. I'm a bit confused about some elements of this Cell thingy though.

• So the CPU is just a normal POWER, right?
  
• But, from the article: "Along side these is a 64-bit Power processor capable of running two threads." "Capable of running two threads"? Is this the same as hyperthreading in the intel processor? I did not know IBM was working on their own implementation of that, have multithreading POWER CPUs been used in a product yet?
  
• It says t*he vector unit is a "VMX", well, that's just the same thing as Velocity Engine / Altivec that Apple uses, it's just a different brandname, right? And that'll be just part of the POWER, like the Altivec unit would be on a PPC?
  
• The SPEs/APUs/"stream processors" are in particular what's confusing me just a little. I can think of lots of circumstances for which these things would be useful. But what I don't get is why, if you have these things, you still need the VMX. For what purposes is the VMX more suited? Has it got better throughput for the applications to which it is suited? Does it work better with the main CPU than the SPEs? Or is the idea here just that you don't have to keep the SPEs busy doing stuff that a normal VMX could handle?
  
• Here's my big concern: on the Mac, the big problem with altivec has been keeping the altivec units fed. A lot of the time the altivec isn't getting used for anything, and even when it is, prior to the G5 there were serious problems with pushing enough data through the bus to keep the Altivec constantly busy. Will the SPEs have this same starvation problem? From the article: Connecting up the processing units is the element interconnect bus (EIB), comprising four 128-bit rings and a 64-bit tag running at half the processor clock. The busses connect to the SPEs through local memory, 256kbyte for each SPE. .. What is this telling us? That each of the SPEs has 256k of private memory to work with? Can SPEs freely read other SPEs "local memory", or only their own? And who fills up this memory initially, and who deals with it once it's done? The main processor? I.E., do the SPEs have access to main or video memory or other hardware, or do they ever require for the CPU to shuttle data to keep them fed? It appears from the original patent overview that the SPEs can talk directly to the memory controller, so if I'm reading that right then that's good-- that seems to make them qualify as actual processing units and not just coprocessors like the VMX is. But then the article seems to be saying the is SPE access to memory is limited-- i.e. it can only be done in block load/stores. Well, are there other limitations, can the APUs talk to (for example) video memory?
  
• But, crucially, who loads the instructions for all of this?? If we've got a CPU that can be running two threads, and 8 little APU/SPEs that are each effectively running as their own processor, and all of this is sharing one memory bus... that's like effectively ten instruction streams to be reading at the same time. Is that going to be a problem? Do each of the 8 SPEs actually independently load their own instruction streams? Or is the idea that they partially use that 256k "local memory" as effectively an instruction cache?

If you can help clarify some of this for me, thanks.

Re:I did, I'm still confused

[be-fan]

So the CPU is just a normal POWER, right?

No. Each Cell has one main (controller) CPU called a PU, and up to 8 seperate vector CPUs called SPEs. The main CPU is a regular 64-bit POWER processor (with SMT --- IBM's equivalent of hyperthreading), while the APUs are very simple processors with a lot of execution resources and insane bandwidth. Such processors are known as "stream processors" in the literature, because they are designed to handle streams of data.

it's just a different brandname, right?

Yes, "AltiVec" (like "G5") is an Apple/Motorola trademark, so IBM can't use it. And you're right, the AltiVec unit is on the PU.

For what purposes is the VMX more suited?

It's there most likely because if you're running some code that isn't suitable for the SPEs, but does need to do vector computations, you don't have to send it off to the SPEs.

Will the SPEs have this same starvation problem?

Potentially, but probably not. Altivec on the G4 was starved because the G4's bus was exceedingly slow. The SPEs are supposed to be on a shared 128GB/sec internal bus, and the Cell has 100GB/sec of bandwidth to main memory.

That each of the SPEs has 256k of private memory to work with?

Yes. In the Cell model, you design your code in "cells". A cell is a clump of code and data that's copied to the SPE's local memory. The code then runs, streaming in additional data from memory, and using the local memory as a workspace.

Can SPEs freely read other SPEs "local memory", or only their own? And who fills up this memory initially, and who deals with it once it's done?

The SPEs local memories are not connected to each other, so each SPE can only read from its own local memory. The memory is filled up by the PU, when a Cell is loaded onto the SPE. The SPE then runs autonomously, and when it finishes, sends the results back to the PU via main memory.

I.E., do the SPEs have access to main or video memory or other hardware, or do they ever require for the CPU to shuttle data to keep them fed?

The SPEs and the PU all talk to a single DMAC, which has access to main memory.

But then the article seems to be saying the is SPE access to memory is limited-- i.e. it can only be done in block load/stores.

Yes. The DMAC, actually, can only read/write in 1024-bit blocks. This isn't really a big deal if you think about it. When a regular CPU reads a memory address, it doesn't read a byte at a time. It loads a whole cacheline at a time. So a P4, for example, usually reads a 128-byte (1024-bit) block at a time from memory anyway.

Do each of the 8 SPEs actually independently load their own instruction streams?

Yes. All the processor units run seperate instruction streams. Each "software cell" runs in its own thread, if you will.

They already tried this on PS2!

[jbischof]

They already tried this for the PS2.

Re:Rambus kills cell...

[WasterDave]

So this will just be like the last time Rambus had their hooks into a product, it will die a very expensive and slow death.

You mean like the PS2 did (given that is uses RDRAM)?

Dave

Intel not impressed

[vandan]

We are very reluctant to adopt architectures like this because they take compatibility and throw it out the window.

You mean like the Itanic? Shoe's on the other foot now, eh?

Re:Intel not impressed

[Ohreally_factor]

"Asymmetric architectures confuse and frighten me."

-- Intel's Caveman Spokesman

Re:But flaming Intel is fun!

[steeviant]

If I were to villify Intel, it wouldn't be for sticking with the x86 instruction set.

I'd villify them for...

Building the 8086 down to such a super low cost, by crippling them with a pitifully small number of interrupts, registers and DMA channels, they knew it was a bad idea but went ahead with the design anyway.

Making a chip (the 286) with an enhanced 16-bit mode, but no way to switch back to real mode (fixed in the 386) which resulted in the 16 bit mode of the chip being nearly useless.

Failing to properly address the I/O problems of the first generation processor until the fifth generation CPU.

Forever upping x86 core speeds in an attempt to convince punters that GHz == instructions executed, despite it meaning that the chips would fail more, and make computers noisier and hotter.

And finally, copying AMDs 64bit architecture without giving any credit. :)

context switching

[ArbitraryConstant]

As I understand it, the APUs can act semi-independantly but the controlling processor has overall control. If that's true, if the processor wanted to (say) switch to some other process would it have to save all that state to somewhere else before continuing, just as standard processors do now?

As all the APUs have lots of big registers and significant amounts of private memory, wouldn't that be painful?

Re:But flaming Intel is fun!

[Detritus]

Making a chip (the 286) with an enhanced 16-bit mode, but no way to switch back to real mode (fixed in the 386) which resulted in the 16 bit mode of the chip being nearly useless.

You weren't supposed to switch back to real mode, which was obsolete. They underestimated the PC industry's fixation on backwards compatibility and overestimated the ability of Microsoft and other software vendors to produce advanced operating systems. It was a decent chip, but it wasn't what most of their customers wanted.

All of this...

[eremitic]

and I bet it still wouldn't be able to run Longhorn.

Don't give me all that jibber jabber

[glrotate]

as Mr. T would say.

How about some actual SPECint and SPECfp?

Oh, nothing like that was released? Hmm. makes you wonder. Sort of like the Itanium flop where the excuse, going on for about 10 years now, is that the compiler isn't quite optimised yet.

Any nerd over 15 ought to have heard far to many claims of "revolutionary cpu design" to know better.

Re:Don't give me all that jibber jabber

[tomstdenis]

I think in this case we're talking handwritten asm for the graphics/sound that is re-used in a higher level lang.

Almost like... the way PS2 programs are developed ;-)

Though yeah, lack of oooe [out of order execution] means that as a general purpose CPU the thing will suck bad [because as you translate from HL to opcodes [risc in this case] there are often many cases of parallelisms and renames you can exploit].

Tom

Re:Where the fuck are you getting this?

[diablomonic]

actually according to the reports ive read, the cell is supposed to debut in servers long before ps3 arrives, and i remember marketing estimates of 16 terraflops for a 1 rack server!!!!!!

Re:don't get your hopes up just yet

[iirving]

The New Xbox 2 (or Xbox 360?) is using the PowerPC , if fact Microsoft is currently using Apple G5 as the development platform. So they will have experiance on the Power architecture. I seem to remeber them doing some work in with NT on PCC in 98? but it was killed.

Re:I wonder....

[WMD_88]

Don't forget KDE bloatware.

Cell's PowerPC core is in-order not out-of-order

[Ideaphile]

I was at the Cell event today, and quoted in some of the news stories. I also have the ISSCC technical papers.

The PowerPC core in the Cell prototype chip is NOT a Power5, as speculated here. According to IBM, this core was designed from scratch for this application. One critical difference is that the new pipeline executes instructions in strict program order rather than reordering instructions to improve throughput as is done with Power5.

Also, IBM has not described the core as "simultaneous multithreaded", just "multithreaded." I presume from this that the multithreading is coarse-grained-- only one thread is active at a time, unlike Power5 which can execute instructions from two different threads in the same cycle.

The logic design for the Cell CPU was optimized for higher clock speeds in a given process than Power5 can achieve. This is a good tradeoff for more linear multimedia algorithms, but reduces effective throughput on other types of code.

I think it's reasonable to suppose that if Apple were interested in using the Cell architecture, it would prefer to use a version of the design that includes a Power5 core in place of the one in the Cell prototype.

. png

Re:Well, cause Intel is a failure

[Sycraft-fu]

Hey man, if $34 Billion in revenue is getting your butt spanked, then line me up and get the paddle.

As for graphics, those have been a huge success, to the point that nVidia and ATi began copying the idea. Intel's integrated chipsets are a huge hit with business. They keep costs and space down, and high performance grapihcs aren't necessary for office work. The integrated low-end graphics chip is getting to be quite popular.

Networking would be another huge non-processor area that they excell in. If you ask me what kind of NIC I want in a server, Windows, Linux, BSD, whatever, the answer is Intel. Nobody else I know makes cards of the same quality. 3com used to, but not anymore.

Now the x86-64 thing is an interesting one to pick on, because the reverse is true. AMD was being the uninnovative one. They decided that innovation, in this case, was unnecessary and counter productive. They decided to just whack on 64-bit extensions to the x86 architecture, as was done with the 32-bit conversion years ago, and call it good. It offered nothing new in terms of ISA, but that meant backward compatibility.

Intel tried to be radical. EPIC is a neat idea that's been messed with for years and never made practical. You have the compiler do all the work of deciding what runs in parallel, rather than the chip. Makes for helaciously complex assembly, but that's ok, you just need a good compiler, and Intel makes the best.

Well, total non-starter in the desktop market, that's gone to x86-64 and it's not changing. However seems to be working in the high end computation market. We just got in 2 racks of SGI Itanium coputers for one of the research labs. From what I hear, they are badass number crunchers.

Now if you want to talk some major failures, let's have a look at AMD's motherboard situation. When the Athlon came out it was abysmal. AMD couldn't produce a reasonable chipset to support their own processors. It was slow and incomplete, and couldn't deal with basics like AGP 2x. VIA had a full featured chipset, that was full of bugs and couldn't handle hardware like the GeForce in many configurations. ACPI problems plauged all boards.

Now the point here isn't to try and say Intel's better than AMD. The point is, both companies have hits and misses. Some products can be both a hit in one way, and a miss in another. However there's a lot of fanboyism about AMD and hate towards Intel and its not productive.

You should pick your platform based off of informed choices about what performs better for you, and gives you that performance at the best price. If you find yourself having to justify it by attacking the other company, you probably made it for the wrong reasons.

This goes extra for doublespeak like hating on Intel for focusing on MHz, then hating on them again when someone else does so.

mod it.

[cgenman]

Cut an 80x80 hole in the top plastic about the middle of the unit, facing upwards. Mount a lo-flow panaflo over the hole, facing up. Wire the panaflo to an external 9v wall wart. Cut the wire to the original fan. For an added bonus, undervolt the panaflo to 6 volts, and add an undervolted rotary fan into the HDD drive bay. This should be silent overall and have a great airflow.

The default internal fan is a 6v 50mm screamer, narrow and loud. Ultimately it moves less air than any undervolted panaflo. Plus it is pretty terribly positioned. A fan on top of your case may prevent you from stacking other equipment on top, but it is perfect for sucking heat off of the gargantuan main heat sink, and gives the fan enough space that the blades don't make that choppy noise. Thanks to a ludicrous heat sink the PS2 doesn't really require that much cooling, though it does require some. It is usually about 20 minutes before a PS2 with no fan will overheat, while a mostly symbolic fan is usually enough.

Of course, the PS2's are engineered to work in hot climates, so if you're near the sahara you may want to run your fan faster. But overall the systems don't need to be noisy.

Re:Ah!

[djward]

And the power supply it needs outputs 1.21 Gigawatts.

Cell is not an x86 competitor.

[flaming-opus]

It is a radeon/geforce competitor. Or something like that.

The cell processor is only really fast when the spus are in use, which means 32-bit non-branching floating-point arithmatic. For anything involving integer math, flow control, or uneven memory access, the SPUs defer to the main processor. I'm sure IBM put a decent processor in there, but it doesn't sound like it's anything revolutionary, and there's only the one.

What does this get you? -- A processor that is really good at decoding mpeg, rendering graphics, maybe approximating the physics of flying dragons. It is not a fast general purpose processor. Operating systems, word processors, databases, these are all integer tasks, and much more-so they are branch tasks. Scientific computation - this requires double-precision floating point. Photoshop is about the only piece of non-multimedia software that might be able to take advantage of this.

The end result is that this will likely be a great chip for set-top boxes of all sorts, maybe even for video-editing workstations. A G5/pentium replacement it isn't; that's a different ball game.

Re:Cell's PowerPC core is in-order not out-of-orde

[EvilTwinSkippy]

The PowerPC instructions core is simply to provide a way to leverage existing compilers against this new architecture. Sony learned, the hard way, that developers don't want to hear about a quirky new instruction set.

I hear you though. The Power5 is designed to handle large multi-process loads. This new Cell architecture, or at least this particular Cell chip, is designed for real time processing of large piles of data.

I'm not reliving computer architecture class... I'm not reliving computer architecture class... (open's eyes) ... Whew