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Intel Core I7 Launched, Nehalem and X58 Tested
MojoKid writes "Today marks the official launch of
Intel's new Core i7 processor, the most major overhaul of Intel's core processor architecture since the release of their Core 2
design. As has been reported, the Core i7 is a major departure from
Intel's aging Front Side Bus architecture of old, now replaced by
Intel's QPI (Quick Path Interconnect) serial links. This 20 lane
bi-directional (40 lanes total) point-to-point connection provides 6.4 GT/s of
bandwidth and scalability for future multi-socket designs as well. In
addition, the Core i7 now has an integrated triple channel memory controller
offering over 3X the bandwidth of the previous Core 2 architecture with
DDR3 system memory. Though the product is set to ship in volume later this
month,
the early benchmark numbers show Intel's new chip is markedly faster
clock-for-clock versus their previous generation CPU and much faster than
anything AMD has out currently."
It's not out until I can buy one from Newegg.
A little hot, but on time, in time for Christmas and slamming the benchmarks. Hey, there is a system that can run Crysis with all the features turned on!
Maybe a price break on the LGA775 quad lineup now please?
Help stamp out iliturcy.
wow! 64 * 10^9 (giga) * 10^12 (tera), or 6.4 * 10^20 bytes per second!!! awesome!!!~
`echo $[0x853204FA81]|tr 0-9 ionbsdeaml`@gmail.com
It's not big and it's not clever. I like my bytes and bits, thank you very much.
Squirrel!
What is a GT/s? (Honest question, looking for an honest answer.)
What is a GT/s? (Honest question, looking for an honest answer.)
Giga-Transfers per second (or at least that's what google found).
"Little does he know, but there is no 'I' in 'Idiot'!"
What is a GT/s? (Honest question, looking for an honest answer.)
Damn, if you had been looking for a biased answer I'd have linked you to Wikipedia...
actually, it's gigatransfers per second... thanx for dkf ( http://slashdot.org/comments.pl?sid=1016475&cid=25611995 ) for informing that link.
`echo $[0x853204FA81]|tr 0-9 ionbsdeaml`@gmail.com
GoaT/se ?
Squirrel!
Of course, "Core 3" was what everyone expected them to do, so Intel couldn't possibly use that. Using imaginary numbers is much more logical.
Will it still play solitaire?
I only please one person per day. Today is not your day. Tomorrow isn't looking good either. - Scott Adams
a beowulf cluster of these!
This trend towards serial links reminds me of the INMOS Transputer. Of course, those links were a hell of a lot slower than modern LVDS communications, but it's funny to see these ideas come back around.
-jcr
The only title of honor that a tyrant can grant is "Enemy of the State."
AMD was brave enough to quit using FSBs in PC CPUs and replaced them with HyperTransport. Years later, Intel also says goodbye to FSBs and uses a similar technology. The innovator took all the costs, and now someone with more resources gets the marketshare. After all, the consumers only want a speedy CPU, they don't care who was the innovator, and speedy CPUs are more readily available by whoever has the most resources to build them. It is, therefore, seen that being the innovator is not always a smart movement in the business chessboard, at least not if you cannot build your innovation in sufficient quantity. That said, I congratulate Intel for finally bringing the cores closer to the RAM, which is a much better technical solution than using an FSB. They should, perhaps, have done that much earlier.
When are the 2 way ones that will be in the next mac pro coming out?
For the desktop where are the nvidia boards and the lower end MB we need more the just the high cost X58 boards.
Also apple should have a 1 cpu core i7 system as well.
Looks great and everything but who has money for such toys? Core i7 965 Extreme, 6GB DDR3, NVIDIA GTX 280, X58 Mobo + other junk = easily $1,600 - $2,000.
Link to the middle of an ad-laden article and to the Cinebench of all pages - because, you know, that is what the average /. reader is running...
Also, add a nice touch: forget to mention that while the i7 is faster clock for clock with the Core 2, it currently tops out at 3.2GHz and has some sort of overclock protection (lowers clock when it goes over 110A or 130w).
My cheap Core 2 is running at 4GHz on just the stock fan, I don't see myself upgrading to the i7 anytime soon.
What did you say? ... What do you mean Cinebench would still run faster?
Violence is the last refuge of the incompetent. Polar Scope Align for iOS
http://anandtech.com/printarticle.aspx?i=3448
http://www.planetx64.com/index.php?option=com_content&task=view&id=1435&Itemid=14
1) 64 bit macro-op fusion is new. See it tested here..
2) Virtualisation is more efficient with nested pagetables.
3) Gaming should benefit, since all x58 mobos support Crossfire
and nVidia SLI.
4) 12 gigs ram supported with 2gb dims - this is rare for desktop boards.
Numerous other minor tweaks, but read it for yourself..
Have fun with your upgrade dollars!
The law is a weapon of the government, not a protection for the likes of you. Surely you understand that.
And I was *just* about to retire my "old" socket 940 dual-core opteron box for a quad core Intel system. I think I'll just wait another month or two and jump to the i7 platform instead. 8-)
Would be nice to see some video and audio encoding benchmarks and some real world application performance numbers instead of teenmarks (gaming performance).
Cheers,
Is there a comparable intel chip for servers coming out? It's been over a year and still nothing can beat the price/performance of the xeon 3220..
-- these are only opinions and they might not be mine.
Another review with some more data, including memory channel performance testing, good explanations of overclocking process, etc.
http://www.pcper.com/article.php?aid=634
But the bus doesn't transmit bits or bytes always. Different buses have different quantities they send on a transfer, and the Core i7 can feed those available today (PCI, PCI-Express, etc) with 6.4 billion per second.
No bits or bytes anywhere to be seen.
Why on earth would you be expecting the the Core 3 to follow the progression of:
Core
Core Duo
Core2 Duo
The correct answer should be the 2Core2 Duo, or the Core2 Duo Dos, or the BiCore2Duo. Maybe the DuoCore2 Duo? Anyway, follow the pattern- keep adding things that mean "2." In several years, we should have had BiDuo2Core2DoubleDuo Dos MarkII.
Instead, it looks we're heading for the e8, or the pi9, or the ln10, or maybe the 11!. Except for that they'll change the pattern again, because now everyone's expecting math terms.
Can anyone tell me how to set my sig on Slashdot?
Go follow the link to the hothardware site. Please don't tell me they are still going to ship their latest CPU ovens with a dorky heat sink that won't allow you to run the CPU beyond 40% sustained usage. I'll buy it after there is at least 50 comments on Newegg saying it works.
..and Intel and AMD, please blast through 3.2Ghz per CPU so all programs work faster all the time.
jsut athnoer menagiensls ltitle psrhae for you to dcoede. Why do we wtsae our tmie dnoig tihs?
Intel's CEO Paul Otellini said production would start in January so expect Apple to ship sometime in Q1.
Can we actually get any more performance out of our computers with faster CPUs and RAM CPU transfers? I've had processors with a 2.2ghz/core speed for some time now(years), and I always find that the only time I really get a slow-down is when accessing hard-disk, not when playing in memory. Jumping from 2.2ghz quad-core to 3.2ghz quad-core is not going to bring you to a new utopia in desktop performance (like upgrading from a P3 to AMD64 was).
For CPUs and memory, the market needs to focus on power usage reduction and fabrication cost reduction, thereby decreasing the cost to all end users. I think they've brainwashed everyone into thinking that more processor power equates to a better PC experience.
Until storage devices can operate at near bus speeds, the average consumer (and even you uber-gamers) do not need these types of numbers for CPU performance. One caveat: there will always be someone who needs the processing speed, but they are not typical of the audience these chips are marketed to.
That's a shitload of bandwidth.
WTF?
Quantities of what then? Digital data breaks down to bits, regardless of how it's transported.
If what you say is literally true, then they have to be converting the digital to an analog signal or there's no data either.
Better explanation required.
"Gold still represents the ultimate form of payment in the world." - Alan Greenspan, 1999
In the case of PCI-Express, Serial ATA and a number of other technologies, it's an 8b/10b encoding. 10 bits are sent which encode 8 bits of data to ensure there are no errors. 10 gigabit ethernet uses a different type of encoding so the transfer size to that over the bus may be different (and perhaps, slower per transfer.)
I think the goal is to make the transfer mechanism not care what physical data is sent over the line, much like the physical layer of the OSI model, and to allow the CPU or other handling mechanisms decode the physical data.
Anyway, think of gigatransfers per second as gigapackets per second. Then number of bytes per packet can vary depending on the type of packet and the data encoded.
Shameless plug for another hardware site's review of the same product, with more benchmarks, a 64-bit OS, and wit.
I second that. Transcoding is a big deal, and not just for folks ripping their commercial videos to servers. It takes several days to complete a full transcode my FLAC audio files to the preferred compressed flavor of my audio player, which changes every year or three. I do it very infrequently because of the time it takes. I would prefer to sync with the device on the fly, but processing speeds are just too slow to do that. I'd rather leave the computer running for a couple days once and then sync from that pool (in a couple of minutes), than have to sync for hours every time I connect and change out the content.
It would also nice to be able to cut together home movies and get the final encode times in the minutes range instead of the hours range.
And then, of course, there are hideously inefficient programs like AutoCAD and Adobe Acrobat. I have yet to figure out how updating a cursor position on the screen takes 1.2 billion operations per second, or typing text takes 2 billion and still can't keep up with my slow keyboarding, but AutoCAD appears to have made that happen. And trying to render large PDFs, both for printing and general browsing of large documents is painfully slow. I want to flip through pages of a PDF like I flip though pages of a book, and even when I have a 24x36 sheet of .1" high text which has been vector drawn, I want it to take far less than than the 8-10 seconds it takes to draw the page today...1/5 second is probably the right threshold.
Is it just my observation, or are there way too many stupid people in the world?
I wonder if they have fixed the security problems of the past.
http://hardware.slashdot.org/article.pl?sid=07/06/28/1124256
> What is a GT/s? (Honest question, looking for an honest answer.)
On Nehalem, bus is 20 bits wide. 1 GT/s = 20 * 10^9 bits/s = 2.5 * 10^9 bytes/s in one direction (link is bi-directional)
Doubling the CPU isn't going to make your Crysis faster, but giving it a faster video card will do a boatload of good.
I'm guessing the only reason you see any difference in Crysis on the Core i7 is only because of the faster bus.
All processors have errata. Waiting is good.
But giga-transfers is a more accurate way to term it, especially when talking about something like the QPI (Quick-Path Interconnect), which is a point-to-point packet-based interconnect similar to AMD's Hypertransport. Each packet is going to involve some number of transfers worth of header information, and some number of transfers worth of data, and these are going to change based on the nature of the transaction. So the actual amount of GB/s of real data you get is going to depend on the nature of traffic itself, and how much of it is data responses versus data-less probe responses or data requests and so on.
I guess you could make some idealized assumptions, and say assume that every incoming packet is a data response packet and figure out the effective bandwidth. It'd give you a GB/s upper bound, at least, which is really all that most GB/s numbers are anyway when say talking about a DRAM bus. But for directly comparing improvements between busses, GT/s gives the most directly comparable number, i.e. the clock frequency.
The enemies of Democracy are
Fuck it, we're doing 1366!
HotHardware also did a video review of the product, right here: http://hothardware.com/Articles/Getting-To-Know-Intels-New-Core-i7-Video-Spotlight/
Like software, VLSI circuits have bugs on release day. The Core i7 CPU is HUGELY complex, and will undoubtedly have bugs. I would rather know the severity of those bugs before spending hundreds of dollars on a new CPU.
Palm trees and 8
But the bus doesn't transmit bits or bytes always.
You really don't know what you are talking about. A bus ALWAYS transfers bits. ALWAYS.
GT/s is only half of a useful metric - it's analogous to talking about CPU frequency without mentioning what specific CPU. The other half of the metric is the width of the bus. Put them together and you can get the actual bandwidth of the bus - in bits and bytes - of the bus. For example, 6GT/s on a 64-bit bus is 48Gigabytes per second.
Only the highest-end processor, Core i7 965 Extreme Edition, supports QPI at 6.4 GT/s. The 920 and 940 support only 4.8 GT/s. So the amount of bandwidth on a QPI link is:
This is comparable to the HyperTransport bandwith of a Phenom processor (4.0 GT/s), which AMD is supposed to scale to 5.2 GT/s in the near future IIRC:
That's only if he wanted a liberal bias. If he wanted the God's-honest-bias you need to send him to Conservapedia.
Every time a brand new processor architecture comes out there are either errata, unforseen shortcomings, or more often both. It's always a good idea not to adopt a new architecture immediately. Let them work the kinks out over the first few steppings.
You obviously know little about processor design nor how many times over the past two decades new architectures have shipped with bugs or design flaws.
No, Intel's own X58 IOH doesn't support SLI due to a licensing disagreement. Whatever. And here's another review using a 64-bit OS.
so if you use an encoding that transfers 1 TB of data per packet versus an encoding that transfers 1 bit of data per packet the Quick Path Interconnect will transfer the same number of packets per second for both? wouldn't that mean the total bandwidth would change depending on the encoding?
the HotHardware article states that:
which makes more sense than being able to magically increase bandwidth by increasing packet sizes.
Not only is it a good idea to wait until they have worked the kinks out, but it can also save you a lot of money. Even just waiting a few weeks can often save you a good chunk of change when it comes to new (and highly anticipated) hardware. However, in this case I'm not sure how much the prices will fall over the longer-term, since they really have no competition in the high-end market.
Then 6.4 gigatransfers per second up to a peak of 25.6GB/s. If your transfers are too small, you can't hit 25.6GB/s, if your transfers are too big, you will start choking on the link.
Both numbers are valid.
http://hothardware.com/printarticle.aspx?articleid=1232
Escher was the first MC and Giger invented the HR department.
My Gigabyte board supports up to 16 gigs. It's pretty old and I paid barely $100 for it a year ago. 12 gigs isn't much these days...
Did I miss cores 3 through 16? ... Damn, I gotta change that default font.
The FSB didn't prevent Core 2 from dominating the 1 to 2 socket market (with exception of some high performance computing applications) in performance. The FSB was even OK for 4 socket Tigerton and even the current 6-core Dunnington Core Microarchitecture products for transaction servers. Where the FSB failed to deliver for Intel's Core 2 was primarily the 4-socket market because it was starving the processor. Intel kept using brute force clock speed to make the FSB good enough (not great) to keep up with the Core 2, e.g. the Stoakley platform with fully buffered DDR2-800 support.
FSB was NOT good enough to keep up with the Nehalem and the move away from FSB architecture was absolutely required. So no, they should not have gotten rid of FSB sooner because the Core 2 was an absolute success these last two years. I think there was a project that would have married Quick Path to a Core microarchitecture chip but it was killed off.
So in hindsight, Intel's timing on the demise of FSB appears to be just right.
But the hardware on each end doesn't see bits and bytes, but packets that could, even if in practice they don't, vary in size.
The gigatransfers per second rating is like "packets per second," and you're right, as I posted in the thread up above without seeing your post, it's only one of the two numbers needed to make sense of the system. If the maximum bandwidth is XGB/s, and the maximum transfers is YGT/s, then X/Y is probably your maximum packet size in bytes, or the most efficient to transmit.
The point is that the interconnect between your chips/cards/interfaces is becoming very similar to the physical interconnect between your computers in a home network.
It'd be very interesting to build a system by which every hardware interface can be represented via an IPv6 address and communicated with accordingly. Why share your whole computer over the network when you can share a SATA drive, a graphics card or a USB thumb drive?
That's what the future is, in my humble opinion.
Judging from many of the comments, I think the software people have come out in force. It seems they think hardware is validated with the same rigor as their own software projects.
To the software nuts I say stay away if you want, then demand will be lower and I won't have to pay higher prices to get a new, faster computer when Core i7 hits the online retailers.
For what it's worth, I design hardware and write software and firmware.
But the hardware on each end doesn't see bits and bytes, but packets that could, even if in practice they don't, vary in size.
No, they do not see "packets" there is no source address field, there is no destination address field, there is no length field, there is no CRC field. There are no fields at all.
You really, really don't know what you are talking about.
Anyway, think of gigatransfers per second as gigapackets per second. Then number of bytes per packet can vary depending on the type of packet and the data encoded.
No. A transfer is not a packet.
When you see figures in GT/s, it nearly always means that if you pick out a single data wire on a bus (or wire pair for differential signals), that is how many raw bits per second actually travel across that wire. It's a measure from the perspective of the transmitter circuit which drives the wire, or the receiver at the other end of the wire.
The term came about because traditionally, knowing the clock of a bus was enough to figure out the transfer rate. The two were always identical: on each wire, one bit was transferred for every clock period. In that era, people just talked about how fast a bus was clocked. With the spread of multi-bit-per-clock transmission schemes, the clock rate is often 2x or 4x slower than the transfer rate. For example, DDR memory runs at twice the clock rate, and Intel's old front side bus runs at 4x (a 1066 FSB Core 2 uses a bus clock of 233 MHz). In that context, it makes more sense to talk about transfers per second rather than cycles per second.
Yes, QPI has packets. No, it doesn't send 6.4 billion of them per second. The minimum unit of transmission for QPI is a 'flit' (FLow control unIT), which is 80 bits. On a full width (20 bit) QPI link, one flit requires four transmissions to send. Packets are composed of one or more flits, so the maximum packet rate (nothing but minimum size packets) for a 6.4 GT/s 20 bit QPI link would be 6.4 / 4 = 1.6 gigapackets per second in one direction.
I assumed a Slashdot reader would consider that being charged is not illegal, neither is being litigated against.