True, but you're looking at two different markets. A microprocessor is a jack of all trades, master of none. And with architecture and process advances, we've been able negate some of the negatives. However, customers who need high performance would want separate chips, as dedicated hardware will always perform better than an integrated solution. Customers who only require a low price want the integrated solution.
There's a reason why NASA is trying their best to get their fingers on ancient CPUs.
Yes, space applications necessitate the need for radiation hardened processors. Due to the nature of the hardening process (special design rules, triple modular redundancy, etc.), these chips dissipate much more heat and operate at lower clock frequencies than the original processor they were based on. But these chips are still made at state-of-the-art facilities; they may not use the smallest processes out there, but technology like SOI (silicon-on-insulator) dramatically improves the radiation-tolerance of the process.
But, NASA is interested in using newer commercial-of-the-shelf processors (IBM PPC based) in order to increase the amount of processing power available on satellites. As an example, take a look at this project that I previously worked on. (Hopefully it will fly sometime in 2009)
Other Processors could refer to something like this FPGA module from DRC.
An FPGA connected directly to a HyperTransport link would provide a processor that can be specified to each individual program.
I think the assertion that designers are "moving away" from OOE is false. Some newer processors are in-order, the Itanium is the main one. But, it's not like designers are moving en mass away from OOE.
It's entirely possible that OOOE could beat out the execution scheme that AMD has going but I wouldn't know enough to comment on it. I remember that there used to be a lot of buzz about IA-64's OOOE processing used on Itanium. But I'm not sure that was too popular among programmers.
There is nothing new with Out of Order Execution. It's been implemented in all the Pentium cores as well as AMD chips from the K6 (I think) on up. In fact, the reason why going to multi-core designs is necessary is because it is difficult to extract any more instruction-level parallelism (ILP) from code using additional hardware techniques. (For instance, some new hardware may increase performance by 3%, but add 10% area to the design) Itanium, which is an in-order processor, shifts the ILP extraction to the compiler.
The article presents a compelling argument for OOOE. And I think that with a tri-core or higher processor, we could really start to see a big increase in sales using OOOE. Think about it, a lot of IA-64 code comes to a point where the instruction stalls as it waits for data to be computed (most cases, a branch). If there are enough cores to compute both branches from the conditional (and third core to evaluate the conditional) then where is the slowdown? This will only break down on a switch style statement or when several if-thens follow each other successively.
Processors can already do what your suggesting. All modern cores from AMD and Intel are super-scalar. This means that there are multiple pipelines running in parallel. If you have two pipelines, you can compute both of the possible results from a branch and discard the incorrect value. BUT, you cut your maximum efficiency by half. (You are using 2x the resources to get 1x the results) You wouldn't want to do the same thing with separate cores for a variety of reasons. Instead, using separate cores for separate threads provides an immediate performance improvement without the need for major code revisions.
I don't think you'll find anyone who is against using OOE. Ideally, you would want a processor that combines good hardware techniques (OOE, branch prediction, prefetching) with a good compiler/ISA (maybe some sort of VLIW, but I still have my doubts about the compiler feasability). The key for AMD and Intel is to find the right balance of hardware and software techniques that provide the best overall performance.
No, it's rounding to the nearest integer. If the fractional value of the number is 0.5 or greater, the number will be rounded up. If the fractional value is less than 0.5 the number is rounded down.
For example, take the number 2.3:
2.3 + 0.5 = 2.8 --> 2
While the number 2.8 gives the following result:
2.8 + 0.5 = 3.3 --> 3
In order to extend this method to arbitrary precision, add 5*10^-n to the original number before truncation. (where n controls the rounding precision)
As another poster has already mentioned the "National Mathematics and Computation Administration" is known as the "NSA". They hire the vast majority of mathematicians in this country. And their budget is most definitely funded by taxpayer dollars, and is many times larger than NASA's budget.
As always, the main argument is whether to pay for practical things now (which we do anyways) versus paying for pure research. The benefit of pure research is hard to quantify, but how would we make advances without it?
As to the benefit of researching astronomy, the processes that go on in the center of stars are exactly the kinds of things that pertain to modern quantum theories such as QCD. (Quantum Chromo-Dynamics, I believe)
Ummm....because that isn't the way our tax system works. Obviously, you can't not pay taxes on things you disagree on; this is just the opposite of that. Besides, if you want to give your money for a project like this, that is what donations are for. You don't really want to let the gov't get into it, do you?
The place where things like TCP offload and RDMA support really matter is the high-end space. The major limitations on building really large clusters is the interconnect. If you look at the top 500 supercomputer list, you'll find that the top computers all use something better than gigabit ethernet. (Mostly Infiniband and maybe Myrinet) The reason for using Infiniband is that the communication latency is around 5us. For comparison , a standard GigE card has a latency around 70us.
That being said, http://www.ammasso.com/ makes an Ethernet card (priced around $495, I believe) that utilizes both TCP offload and RDMA. The latency of the cards is around 10us. This is great for people needing a high-performance cluster, but can't afford the Infiniband interconnect.
Dell isn't a hardware company. Hardware companies include AMD and Intel and Crucial and Infineon and....the ones who make hardware. Apple could be considered a hardware company for the iPod, but not for the Macs.
There isn't anything wrong with being a system provider, but the main value-add that Apple supplies is the software and integration.
This isn't just a circuit or piece of logic. This involves special process steps to treat the silicon so that its bandgap properties are altered. I'm sure that they have some sort of logic to show that the device has functionality, though.
I like the concept of integrating an optical layer through the dielectric, but I don't know if that would work. The photons in the laser may interact with the silicon outside of the dielectric and produce a photo-electric effect.
You put channels in quotes so I'm not exactly sure of your meaning. Is the field-coupling effect from parallel channels of the same wavelength? Or did you mean "channels" as in each wavelength used is a different channel?
Also, does anyone know if this technology can only produce a single wavelength or can the wavelength can be varied?
Re:Speaking of mechanical computers...
on
Lego Logic Gates
·
· Score: 2, Interesting
I did a little bit of searching and haven't been able to find anyone who still has one. I did find this site which has the digi-comp 1 implemented in knex.
Re:you forgot patents!
on
HIV Vaccine
·
· Score: 1
I don't know about the canadian patent system, but last I checked US drug patents last 17 years. After the drug goes through human trials and reaches the market, there may be ~8 years left.
Yeah, yeah. At the lab that I worked at, we had access to two Itanium workstations with 1.5MB cache. When we were benchmarking them next to our Xeon and Opteron machines, Itanium were not performing well. I'm not saying that they don't work well in certain applications, just not the ones that we were working with.
Looking at spec.org, the 1.5MB Version of the Dell PowerEdge 3250 gets a SpecInt score of 824, while the 3MB version has a score of 1022. The 6MB version has score of 1099, but it is 100 MHz faster. So, going from 1.5MB to 3MB increases performance by 25%. Pretty Significant. No? Meanwhile, a Xeon 3.06 GHz with 0.5MB cache gets a score of 1067. The 1.5MB version of Itanium performs on the level of a 2.2GHz Xeon.
Anyway, I got a bit off topic. You have a point about some of the optimization techniques. Although, is it common for people to optimize in assembly for a VLIW architecture? I don't know; I've never done it myself. I thought the whole point of VLIW is that you need to have really good compilers to do optimization for you.
Slashdot Mirror
But nobody writes jokes in base 13.
Like microcode updates?
If you reread his comment, you'll see that he actually said. He said to save $18k off of a $60k salary.
True, but you're looking at two different markets. A microprocessor is a jack of all trades, master of none. And with architecture and process advances, we've been able negate some of the negatives. However, customers who need high performance would want separate chips, as dedicated hardware will always perform better than an integrated solution. Customers who only require a low price want the integrated solution.
You say that like it's a bad thing...
3 dimensions, 6 degrees of freedom. More than 3 dimensions would require the manipulation of time and/or some string theory dimensions.
Yes, space applications necessitate the need for radiation hardened processors. Due to the nature of the hardening process (special design rules, triple modular redundancy, etc.), these chips dissipate much more heat and operate at lower clock frequencies than the original processor they were based on. But these chips are still made at state-of-the-art facilities; they may not use the smallest processes out there, but technology like SOI (silicon-on-insulator) dramatically improves the radiation-tolerance of the process.
But, NASA is interested in using newer commercial-of-the-shelf processors (IBM PPC based) in order to increase the amount of processing power available on satellites. As an example, take a look at this project that I previously worked on. (Hopefully it will fly sometime in 2009)
I believe the usual first-order approximation is (2/3)*c.
Other Processors could refer to something like this FPGA module from DRC.
An FPGA connected directly to a HyperTransport link would provide a processor that can be specified to each individual program.
I think the assertion that designers are "moving away" from OOE is false. Some newer processors are in-order, the Itanium is the main one. But, it's not like designers are moving en mass away from OOE.
I don't think you'll find anyone who is against using OOE. Ideally, you would want a processor that combines good hardware techniques (OOE, branch prediction, prefetching) with a good compiler/ISA (maybe some sort of VLIW, but I still have my doubts about the compiler feasability). The key for AMD and Intel is to find the right balance of hardware and software techniques that provide the best overall performance.
You do realize that the Cell's 7 SPEs are the cores that enable the high performance, right? The PPC core is pretty much just the coordination.
No, it's rounding to the nearest integer. If the fractional value of the number is 0.5 or greater, the number will be rounded up. If the fractional value is less than 0.5 the number is rounded down.
For example, take the number 2.3:
2.3 + 0.5 = 2.8 --> 2
While the number 2.8 gives the following result:
2.8 + 0.5 = 3.3 --> 3
In order to extend this method to arbitrary precision, add 5*10^-n to the original number before truncation. (where n controls the rounding precision)
As another poster has already mentioned the "National Mathematics and Computation Administration" is known as the "NSA". They hire the vast majority of mathematicians in this country. And their budget is most definitely funded by taxpayer dollars, and is many times larger than NASA's budget.
As always, the main argument is whether to pay for practical things now (which we do anyways) versus paying for pure research. The benefit of pure research is hard to quantify, but how would we make advances without it?
As to the benefit of researching astronomy, the processes that go on in the center of stars are exactly the kinds of things that pertain to modern quantum theories such as QCD. (Quantum Chromo-Dynamics, I believe)
Ummm....because that isn't the way our tax system works. Obviously, you can't not pay taxes on things you disagree on; this is just the opposite of that. Besides, if you want to give your money for a project like this, that is what donations are for. You don't really want to let the gov't get into it, do you?
That being said, http://www.ammasso.com/ makes an Ethernet card (priced around $495, I believe) that utilizes both TCP offload and RDMA. The latency of the cards is around 10us. This is great for people needing a high-performance cluster, but can't afford the Infiniband interconnect.
Dell isn't a hardware company. Hardware companies include AMD and Intel and Crucial and Infineon and....the ones who make hardware. Apple could be considered a hardware company for the iPod, but not for the Macs.
There isn't anything wrong with being a system provider, but the main value-add that Apple supplies is the software and integration.
Both are acceptable spellings.m
http://dictionary.reference.com/search?q=vulcanis
True. The statement should say that the layer of aluminum oxide resists further corrosion.
This isn't just a circuit or piece of logic. This involves special process steps to treat the silicon so that its bandgap properties are altered. I'm sure that they have some sort of logic to show that the device has functionality, though.
I like the concept of integrating an optical layer through the dielectric, but I don't know if that would work. The photons in the laser may interact with the silicon outside of the dielectric and produce a photo-electric effect.
You put channels in quotes so I'm not exactly sure of your meaning. Is the field-coupling effect from parallel channels of the same wavelength? Or did you mean "channels" as in each wavelength used is a different channel? Also, does anyone know if this technology can only produce a single wavelength or can the wavelength can be varied?
I did a little bit of searching and haven't been able to find anyone who still has one. I did find this site which has the digi-comp 1 implemented in knex.
I don't know about the canadian patent system, but last I checked US drug patents last 17 years. After the drug goes through human trials and reaches the market, there may be ~8 years left.
Stop drinking the AMD coolaid.
Yeah, yeah. At the lab that I worked at, we had access to two Itanium workstations with 1.5MB cache. When we were benchmarking them next to our Xeon and Opteron machines, Itanium were not performing well. I'm not saying that they don't work well in certain applications, just not the ones that we were working with.
Looking at spec.org, the 1.5MB Version of the Dell PowerEdge 3250 gets a SpecInt score of 824, while the 3MB version has a score of 1022. The 6MB version has score of 1099, but it is 100 MHz faster. So, going from 1.5MB to 3MB increases performance by 25%. Pretty Significant. No? Meanwhile, a Xeon 3.06 GHz with 0.5MB cache gets a score of 1067. The 1.5MB version of Itanium performs on the level of a 2.2GHz Xeon.
Anyway, I got a bit off topic. You have a point about some of the optimization techniques. Although, is it common for people to optimize in assembly for a VLIW architecture? I don't know; I've never done it myself. I thought the whole point of VLIW is that you need to have really good compilers to do optimization for you.