Posted by
CmdrTaco
on from the coming-to-a-pc-near-you dept.
Scrooge919 writes "An article on ZDNet discusses AMD's plan for the successor to Opteron -- the K9. The biggest feature will be that it contains multiple cores. The K9 is currently slated for the second half of 2005, which would be less than 3 years after the Opteron shipped."
If the first thing you think of when you see "K9" is "an obscure klingon warship" rather than "dog" (or "crappy movie"), you, my friend, are a true geek.:)
Re:Might As Well Get It Over With...
by
Euphonious+Coward
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· Score: 1
I can just imagine the insane grin
on the face of the guy who named
the K1. "Long after I've moved on,
they'll have to release generation nine
of this thing, and then I'll have my revenge!
Ha ha ha."
Re:Might As Well Get It Over With...
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Anonymous Coward
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· Score: 0
Well AMD, off you go. good luck and dogspeed
Re:Might As Well Get It Over With...
by
adeyadey
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· Score: 1
I thought you were going to make the Beowulf joke..
-- "You lied to me! There is a Swansea!"
Re:Might As Well Get It Over With...
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Anonymous Coward
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· Score: 0
Imagine a beowulf *ducks*
cluster of th*whack*.
Re:Might As Well Get It Over With...
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Anonymous Coward
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· Score: 0
IIRC the K naming started with the K6, so he wasn't that patient...
Note that the naming convention changed when Intel came up with the Pentium (until then, competitors would just use Intel's model numbers they were compatible with), one of their marketing moves against competitors (Intel Inside was another one).
Re:Might As Well Get It Over With...
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Anonymous Coward
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· Score: 0
Imagine cleaning up after a Beowulf cluster of K9s; that's one big pooper-scooper.
Re:Might As Well Get It Over With...
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Anonymous Coward
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· Score: 0
Doctor Who fans might not give a rat's arse about what Jim Belushi thinks though. And all his films were shite anyway.
Re:Might As Well Get It Over With...
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Pyro226
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· Score: 1
I thought you were going to make the Beowulf joke..
This new multi-core technology will make Beowulf clusters obsolete. Thus elminating cliche using karma whores.. oh wait, this is Slashdot.
Good call.
-- This message is encrypted with Quad ROT-13 to protect the author's copyright under the DMCA.
Re:Might As Well Get It Over With...
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Rob+Simpson
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· Score: 1
Nah, that'll be the Prescott. DRM, not 64-bit, and over 100 watts? Where can I sign up?
Re:Might As Well Get It Over With...
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Anonymous Coward
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· Score: 0
You have been watching either too much Family Guy or Futurama.
Re:Might As Well Get It Over With...
by
darqchild
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· Score: 1
I saw a K5 once when i was working in a used parts store.
-- What? Me? Worry?
Re:Might As Well Get It Over With...
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slickwillie
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· Score: 1
If Saturn cars ever make a model number 5 I'll buy it.
Re:Might As Well Get It Over With...
by
Euphonious+Coward
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· Score: 1
In fact, I have the predecessor to the K6, which
was called NexGen. It emulates a 386 but runs
at about 10% faster than an equivalently-clocked
Pentium, ~100MHz.
sounds like a real dog to me...
thank you. i'll be here all week. please, tip your server. *bows*
K9 Processor?
by
Ridgelift
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· Score: 0, Redundant
Chips based on the K9 architecture will likely be released--at least in sample quantities--by the second half of 2005, Weber said. AMD engineer Randy Allen is overseeing the project.
Note to marketing department: New "K9" chip promises to be "a real dog".
Ya but we don't know crap about what it is supposed to be able to do so I am not that enthused
Re:ya so...
by
Anonymous Coward
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· Score: 0
c'mon man, even my GREASED YODA DOLL knows that more is better. Multiple CORES man... They'll call it the "Fasteron-MoreBetter" architecture and it will be teh rule.
INTEL - are you there ? Please go buy off this pesky little companies. Or at least try to claim that they stole your patented code and sue the hell out of them. This is called business vision now a days...
Meanwhile china is sending people out in space and india is building ICBMs....
--
- People who believe other people have no right to live, got no right to live...
Re:Intel--where art thou ?
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Anonymous Coward
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· Score: 0
That and they have all the jobs and manufactoring. What's America needed for again?
Re:Intel--where art thou ?
by
Anonymous Coward
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Well, someone has to rock the boat in international politics. Can you imagine a world living in peace? No, that's something this country won't sit still for!
Re:Intel--where art thou ?
by
The+Cydonian
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· Score: 1
I am glad to see chipmakers getting off their asses and making progress finally.
I guess they are ramping up due to the fact that the lack of corporate spending on tech is going to have to have a turnaround shortly saying that all the computers people bought a few years ago now need to be replaced. However comes out ahead here is bound to make a lot money.
Re:this is good..
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Anonymous Coward
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· Score: 0
You can thank AMD for the progress you've seen - without them, Intel would be stagnating, and because of how hardware works, there wouldn't be any open-source-type competition to try to compete.
I am glad to see chipmakers getting off their asses and making progress finally.
"Finally"? They've been making steady improvements over the past twenty years. Just over the past ten years:
- CPU frequencies have increased by 30 times. - Memory bandwidths have increased by 24 times. - CPU complexity has increased by a good factor.
The times used to be when x86 processers were the slaggards of the computing world. Now, if you compare the computing power of a modern x86 processer to competing processers costing ten times more, often the x86 processer will win.
Now, the competing processers have features which are still beyond the x86 realm, but the fact still remains that a $400 x86 chip, by itself, can often out-perform a $2,000 or $3,000 competing chip.
steve
-- Oh, you're not stuck, you're just unable to let go of the onion rings.
Re:this is good..
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Anonymous Coward
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· Score: 0
CPU complexity has increased by a good factor
Since when was extra complexity good. Or do you just mean they get more done per cycle than before?
"The K9 is currently slated for the second half of 2005, which would be less than 3 years after the Opteron shipped."
Ah! Obsolescense, thy name is "Charge Card".
AMD? 2005?!?! Who cares? G5 Available *NOW*!
by
Anonymous Coward
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· Score: 0
Why would you care about this when you can have a G5 Mac today? The fastest desktop computer on earth, with the most advanced OS out there, why wait for crap from a second rate pee cee cpu manufacturer? Ugh, you'd even have to run Linux or Windows on it. Wake me up when those either of them match the functionality, useability, or performance of OS X.
Just in case nobody has said this yet..
by
Anonymous Coward
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· Score: 0
But is it a 64 bit chip?
by
Anonymous Coward
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· Score: 0
It appears that this chip based on the x86 architecture. Why would AMD still focus on the x86? By 2005, the Opteron should of made a big enough dent in the market so *hopefully* by then most everyday software would be 64bit. I wish the industry would shift away from x86 and move on the 64bit processors, which we all know is the future of computers.
Re:But is it a 64 bit chip?
by
TrueBuckeye
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· Score: 1
AMD is hedging their bets. They have a shot at leading the 64-bit field and at the same time not loosing legacy users.
-- Was that night on the marge of Lake LaBarge I cremated Sam McGee...
Re:But is it a 64 bit chip?
by
locke+baron
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· Score: 1
Umm, if it's an outgrowth of Opteron, then it automagically does both. X86-64 chips run 32-bit x86 code without modification. (Not just marketing hype. I've got an Athlon64, and it does indeed work as advertised.)
Which chip would that be?? The only AMD CPU with a K moniker that I can recall as being slow was the original K6. Everything since then has been on par or better than the Intel equivalent.
You're not thinking of the K6 are you? That was actually a very good processor, it was faster than the Pentium. Unfortunately though for AMD, intel adapted the PPro for consumer use and called it the Pentium II, and suddenly the K6 had to compete with that. Even so, the K6 still compared favourably on integer operations, eg K6-2 and III's @ 450MHz both beat the faster clocked Celeron 500MHz and the K6 isnt that far off the Pentium II at SPECint95.
The K6 did suck a bit at floating point though, especially compared to the PII and even the Pentium MMX. But otherwise, for general purpose work, it was a fine CPU, especially the rare K6-III with its on board L2 cache.
-- I use Friend/Foe + mod-point modifiers as a karma/reputation system.
You forgot about the K5, AMD's competitor to the original Pentium. If any chip AMD ever made could be called slow and underperforming, it was the K5.
When the K6 was released it was arguably the fastest processor in the world. AMD's problem was that Intel brought out the PentiumII roughly one month after AMD released the K6, and it was pretty much all downhill from there for AMD. The chip still managed to compete well on the low-cost side of things for a while though.
Re:Don't use letter K
by
ChaoticLimbs
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· Score: 1
I have an Athlon XP in my desktop machine, and a K6-2 500 in the fileserver in my garage. The K6-2 was worth keeping. I have never had any trouble with it, and it keeps up pretty well with my applications.
I don't know any other way to get life out of 100mhz SDRAM.
The K7 (Athlon) rocked anything Intel put out for quite some time. I knew it would, and really kicked myself for not buying AMD stock when it was something like $7 a share, and selling it about 6 months after the Athlon launch when it was over $50.
How about with a Pentium III? Many of those have a 100 MHz bus. The highest clocked one is 1 GHz, if I recall. The problem would be finding one for a reasonable price. They are rare and run about US $200-300.
The K5 was faster than the Pentium at integer and shift operations. For a nice little "benchmark" for this, compare the perfomance of the Distributed.net client on a K5 and a Pentium.
Besides, the K5 wasn't designed by AMD. It was the same chip as the NexGen Nx586, which AMD aquired when they purchased NexGen. All they did was rebrand it as the K5, add a few speed bumbs, and use the NexGen engineers to help design the K6.
The K5 was completely designed ground up by AMD. No NexGen involvement at all. The K6 was the chip that was originally the Nx586. After AMD purchased NexGen they modified the design to run on a socket 7 bus and glued MMX onto the chip and sold it as the K6.
As for the K5 and it's shifts, that's all well and good if all you use your computer for is Distributed.net, but if you actually do anything productive with the chip, it was pretty poor. Now, mind you, half of the problem was that AMD had about a year's worth of delays due to manufacturing, so by the time AMD shipped the chip they were running at a MUCH lower clock speed than Intel's chips. So, while the K5 might have been slightly faster, clock for clock, than the Pentium at integer operations, it was only running at ~75-100MHz when Intel was selling 166 and 200MHz chips. If the K5 had been even remotely close to being on-time it might have stood a chance. As it was though, that chip was almost the death of AMD. Their market share had dropped SIGNIFICANTLY, down to about 3 or 4% from a high of 30% in the late 386/early 486 days.
Multiple cores?
by
adaknight
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· Score: 3, Insightful
So, now we'll have multiple processing units and pipelines in each core, and multiple cores. The biggest question in my head is how much limitation there will be from memory bandwidth limitations. I just don't see how you can supply data and instructions fast enough to, say, three 3 GHz cores running on the same chip unless you have close to a thousand pins on the chip. The other question would be about cooling.:)
As for memory bandwidth, the nature of the Opteron already solves that: Each core has it's own memory controller, so for each core you add, you're adding more memory bandwidth.
As for a thousand pins on the chip, I believe the Opterons are already near that. If you add in the extra pins for the memory controllers, you're probably looking at a minimum of 1500.
steve
-- Oh, you're not stuck, you're just unable to let go of the onion rings.
Honestly now, its been a very long time since data could be bussed to the CPU fast enough to take full advantage of the chip's speed. Chipmakers spend so much time convincing us that we need these insanely fast processors, when in reality, a large portion of the chip's cycles go wasted because the data simply can't get to the chip that fast. I have two main machines -- an intel Celeron 400 and an AMD Athlon 2400+ (so like, 1997mHz). In theory, my Athlon should be five times faster than my Celeron -- in practice, its maybe 2x. Its all marketing, and I fall victim to it just like everybody else.
Right, this was my point. Processor speed nowadays is so much faster than memory and disk that I wonder how they overcome the hurdles without caching all of main memory.;) With several cores in the same package, bandwidth to your RAM is probably going to be *the* decisive factor in how fast your overall system performs.
That and whether your processor spontaneously combusts.
The whole design of systems is going in the direction where main memory will be considered as slow as disks once were.
It will be considered as much a sin to miss the L2 cache as it is to swap.
The chips that will be speed kings will be the ones that can afford huge fast caches.
-- "Provided by the management for your protection."
Re:Multiple cores?
by
Anonymous Coward
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· Score: 0
I wanna see a memory modules with full processors on each memory core. And have all the memory chips tied together by hyper-transport busses. That will probably be the logical next step, tiny clusters of memory/cpu modules in the system
i dont think this is such a huge issue just look at the pentium multiprocessor architecture. afaik every processor shares just one bus so if you have 4 procs in your box every of it has just 1/4th of the memory bandwidth of a single one.
so puting more than one core on a chip wont be so bad especially if amd keeps up the good work like having a seperate memory channel for each cpu
--
--
Karma: beyond good and evil - mostly affected by posting political
There are two things that AMD is working towards in this chip. The first is multiple cores, while the second is on-chip multithreading (SMT, same as Intel's Hyperthreading). The first may increase the bandwidth needs of the chip, but the latter is actually designed to reduce them, in a manner of speaking.
SMT allows one thread to do a bit of processing for a while, until it runs out of data. It requests data from memory and then goes off to lala-land for a little while while the other thread takes over. Since most (typically 97%+) data is stored in cache, the second thread usually has quite a bit to do before it runs out of data. By that time, hopefully the first thread's data has arrived and it can take over and do it's thing again.
Note that this isn't really doing much of anything for bandwidth, so much as hiding latency, which is the real problem on modern processors. Consider this: since the 386, processor speed has gone up by a factor of about 500. Memory bandwidth has gone up by a factor of about 64, but latency has only decreased by a factor of about 10 or less. So while processors are slightly lacking in bandwidth, the biggest problem is latency.
Now, the upside to all this, latency has improved a LOT in the last year or two. First, nVidia and Intel did a bang-up job with their memory controllers in the nForce2 and i875 chipsets, dramatically reducing latency as compared to most previous chipsets. Second, AMD has pushed even further forward with their Opteron/Athlon64 chips (and will continue with this K9) by integrating the memory controller right on-die, further reducing latency.
Re:Multiple cores?
by
Anonymous Coward
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· Score: 0
See Rambus XDR 128-bit 6.4GHz DRAM (100GB/sec+ bandwidth) due in 2006.
Re:Multiple cores?
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Anonymous Coward
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And this memory can also be used in multi channel configs, and processors can have multiple buses, ya'know. Just imagine a processor with 4 cores, each with their own bus, with two XDR memory banks per bus in a dual channel config. That'd provide 200GB/sec per bus/core, or 800GB/sec total.
Re:Multiple cores?
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Anonymous Coward
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· Score: 0
"In theory, my Athlon should be five times faster than my Celeron -- in practice, its maybe 2x. Its all marketing, and I fall victim to it just like everybody else."
This is a common misconception. The clock-frequency is not a good way to compare the speed of two different CPU's. You can't even compare two CPU's from the same family that way. You'd think that a 2 GHz Athlon XP would be twice as fast as a 1 GHz Athlon XP, but that's where you're wrong. No processor scales that well, it might be 80% faster (I just made up that figure), but no processor reaches 100%. Besides, different CPU's take different amounts of clock-cycles to do different operations. It was easier back in the day before multi-threading and multiprocessing and whatnot. Back then you could in many cases calculate the exact number of clockcycles a specific program would consume, and in theory calculate the time it would take to run.
Disclaimer: I am not a Electrical Engineer (or whatever CPU-designers call themselves)
And to further feed an unhealthy addiction to chipr0n, take a look at the 8-way Power5 shown at the Microprocessor Forum with 144 MB of cache - more space in cache than was on my whole disk in the early 1980's - but with a little bit more bw and less latency.
-- "Provided by the management for your protection."
Geez, one board now has as much CPU power as a whole rack from several years ago. History repeats itself yet again. For even medium-sized companies, I can't imagine anything larger than a single rack for most of their infrastructure (two RAID arrays can easily handle more than 1TB, and a couple two-way or four-way servers provide a lot of oomph for databases and internal websites).
I wanna see a memory modules with full processors on each memory core.
This has already been done in some capacity for at least seven years, now. My Sun Creator 3D video card, for exmaple, has 3DRAM which does some computation in the RAM itself.
When I was still in school, there was a lot of buzz among grad students about "processor in memory" research. So, the ball is definitely rolling for these architectures.
Re:Multiple cores?
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Anonymous Coward
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· Score: 0
From a memory standard hijacker? Do you seriously think anyone will want to deal with the same crook who pulled a fast one on Intel, and almost screw up the entire memory industry? Only fools will ever trust Rambu$ for any more new technology.
this is good..Linux condoms.
by
Anonymous Coward
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· Score: 0
"I guess they are ramping up due to the fact that the lack of corporate spending on tech is going to have to have a turnaround shortly saying that all the computers people bought a few years ago now need to be replaced".... not if they're running Linux.
Re:this is good..Linux condoms.
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joeldg
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· Score: 1
true..
if you can run linux on a zilog, well, you can run it on anything.
Let's hope it is affordable.
by
TrueBuckeye
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· Score: 1
If this ever has a chance of being successful, it has to win the price war. Corporations are so hesitent to look at AMD, especially for servers, the only way they will win is through that great cost/benefit analysis bull.
-- Was that night on the marge of Lake LaBarge I cremated Sam McGee...
AMD TimeLine to Reality Generator?
by
supremebob
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· Score: 2, Insightful
Let's see... AMD missed the original launch date of their Barton core CPU's by at least 3 months, missed the launch date of the Opteron by over 6 months, and the original launch date of the Athlon 64 by almost a year.
If they're saying now that the chip will be 4Q 2005, when should we REALLY be expecting it to show up on store shelves? 3Q 2006? 1Q 2007, maybe?:)
Re:AMD TimeLine to Reality Generator?
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Chad+Page
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· Score: 1
I remember reading things about Sledgehammer being due in 2001. I forget how legit those sources were, but if they were it was a heck of a lot more late than 6 months.
Re:AMD TimeLine to Reality Generator?
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Anonymous Coward
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That's standard practice in the microprocessor industry. I don't think there's been a single general purpose microprocessor in the last twenty years that has launched on time. I figure that by now the vendors have to figure this in their published estimates -- AMD is probably pretty sure that they'll be done by the end of 2006 but they have to tell people they're planning for a 2005 launch so that people know to be prepared for a 2006 launch:)
Re:AMD? 2005?!?! Who cares? G5 Available *NOW*!
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molnarcs
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· Score: 1
Yeah, sure the fastest...
http://www.pcworld.com/news/article/0,aid,112749,p g,1,00.asp
This makes a lot of sense.
by
NerveGas
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· Score: 2, Interesting
As the manufacturing process shrinks, and companies are able to put more transisters on a chip, the question arises: What should we use those extra transistors for?
Now, there are several options. They could come up with a new processer design, but that takes a tremendous amount of R&D. They could just put tons of cache on the chip, but that gives diminishing returns.
Or.... the Opterons already have very simply I/O mechanisms, namely, HyperTransport. Literally all they have to do is plop down two Opteron cores, connect the HyperTransport lines, and bam: Dual-core processer. I'm honestly surprised they're not doing it SOONER.
Of course, the lines for memory controllers and the like have to be drawn out to the pins on the packaging, but that's a piece of cake.
steve
-- Oh, you're not stuck, you're just unable to let go of the onion rings.
Re:This makes a lot of sense.
by
geeveees
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· Score: 1
The article states that the Opteron already supports two cores, they could just add one and that'd be it.
-- I am a viral sig. Please help me spread.
Re:This makes a lot of sense.
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Anonymous Coward
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· Score: 0
As the manufacturing process shrinks, and companies are able to put more transisters on a chip, the question arises:...
Thank god you didn't say "this begs the question."
Re:This makes a lot of sense.
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NerveGas
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· Score: 1
Yet another reason why you shouldn't look to magazine articles as gospel truth.
While the currently-available 2xx-series Opterons only support two-way processing, the 8xx series is due out shortly, and (as the model number suggests), supports up to 8-way processing.
steve
-- Oh, you're not stuck, you're just unable to let go of the onion rings.
Re:This makes a lot of sense.
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Anonymous Coward
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· Score: 0
And what does that have to do with having more then one processor on a die?
Re:This makes a lot of sense.
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Anonymous Coward
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more like thank allah. AM I RITE?
Re:This makes a lot of sense.
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Anonymous Coward
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Sun announced
something similar recently. Likewise, Intel has had Hyper-Threading. This kind of step is not all that surprising.
It seems like the processor guys have to one-up each other. Intel announces hyper-threading to be almost like having two processors on one chip. Sun announces UltraSparc IV which does have two processors on one chip (release in 2006). AMD announces K9 which is to have two processors on one chip(release before 2006).
I expect Intel to announce either multi-processor chips or enhanced hyper-threading for release in early 2005.
Re:This makes a lot of sense.
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DickBreath
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· Score: 1
As the manufacturing process shrinks, and companies are able to put more transisters on a chip, the question arises: What should we use those extra transistors for?
I will be so bold as to predict what these extra transistors will be used for.
Most people only need so much cpu power. Yet Moore's law continues to march onward.
Computers will get cheaper and cheaper. Like pocket calculators. I think we haven't seen seen how cheap computers are going to get. You think the low end cheap Linux computers are the bottom, I say no. With decreasing costs, the form of the computer will change.
I remember when 8 digit 4 function calculators broke the $400 price barrier. A few years later they were $50. This seemed amazing! Who could have thought that calculators with square roots and memory would cost $4, or even come in a box of cereal? Or be a $2 keychain gimmic?
I see no fundamental reason that the type of computer that an average joe uses couldn't be a large plastic brick. No fan. Maybe at some point, no HD, given the increasing sizes of these removable storage cards.
Get rid of PCI slots and replacable HD and CD, and you've just made the computer a lot cheaper. Maybe only USB connectors for keyboard / mouse. Headphone, mic., monitor, and you've got a very basic, cheap computer suitable for most people. Power supply becomes a large ac adapter brick. (On some smaller OEM computers the power supply is practically this now! But just in the standard metal bolted-in configuration.)
So how can we make this computer cheaper and smaller and cheaper? Well, minimize parts on the motherboard. Combine onto one chip the CPU, and more of the motherboard functions. Maybe even memory. Remember, we're talking about a non-upgradable computer. Something that eventually becomes even disposable like pocket calculators. As transistor counts rise, non-upgradable box prices fall. Eventully the motherboard is just a chip. Put it into the keyboard, ala TRS-80. Now the form factor is a keyboard and a flat panel monitor. The "keyboard" (and cpu) gets replaced every once in awhile. Just toss it and get a new one for $39.
--
I'll see your senator, and I'll raise you two judges.
Re:This makes a lot of sense.
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labratuk
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· Score: 1
...companies are able to put more transisters on a chip...
Re:This makes a lot of sense.
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Anonymous Coward
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· Score: 0
Indeed, the Opteron is ALREADY capable of Dual-core mode. It will come at the 90nm node... Imagine it as a test version for the K9's internal crossbar... I guess the K9 is going to have a bit more than two cores on the same die... I mean they could do such thing like Work Unit sharing:)
Re:This makes a lot of sense.
by
ShipIt
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Eventully the motherboard is just a chip. Put it into the keyboard, ala TRS-80. Now the form factor is a keyboard and a flat panel monitor.
Yes, and then just add a hinge and you've invented the laptop!
Re:This makes a lot of sense.
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dcmeserve
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What should we use those extra transistors for?
Now, there are several options. They could come up with a new processer design, but that takes a tremendous amount of R&D. They could just put tons of cache on the chip, but that gives diminishing returns.
Or.... the Opterons already have very simply I/O mechanisms, namely, HyperTransport. Literally all they have to do is plop down two Opteron cores, connect the HyperTransport lines, and bam: Dual-core processer. I'm honestly surprised they're not doing it SOONER.
Plopping down multiple cores is one of the *last* things you do with an architecture; it's what you do when you've run out of other options.
Actually, take a closer look at the article:
... Opteron, in fact, is designed in a way that enables a second core to be added, Weber noted.
"We will have a multicore product," Weber said.
...
Kinda misleading for that to be in an article about K9, isn't it?
For new architectures, there's a surprisingly large amount you can do to sqeeze more instruction-level parallelism out of a single core (longer lookahead buffers, improved trace cache, etc.). You can use up *lots* of transistors with that stuff, and come out with a better performance enhancement than multiple cores will give you for your average program -- which is still typically not going to be multi-threaded.
Yes, designing new architectures is expensive, but then once you have a good processor design team put together, and they've given you a great processor -- what are you gonna do, lay them all off? You really want to bet your company's future on milking the current architecture forever?
I think that multicore is becoming a standard tool in the "what do we do to push this architecture farther?" arsenal for all new CPU's. You don't necessarily go with it right off the bat, if you have a truly advanced architecture to start with.
-- "Orthodoxy is unconsciousness" - Orwell
Re:This makes a lot of sense.
by
NerveGas
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· Score: 1
Plopping down multiple cores is one of the *last* things you do with an architecture; it's what you do when you've run out of other options.
I don't really think so. It's not a matter of simply making a single processer as fast as you can, that's not the commodity market these are intended for. IBM learned years ago that in multiprocessing situations, increased bandwidth is very important, and that getting huge gobs of bandwidth at very low latencies is much, much easier to do if it's all kept on the same chip. It would be easy enough (and CERTAINLY cheaper) to have each core on it's own chip, but getting huge amounts of low-latency bandwidth between them gets prohibitively difficult.
Precisely one of the reasons that the Athlon is such a strong performer is because the memory controller is embedded into the processer, greatly reducing memory access latency. They certainly didn't go to all that work for nothing! And putting more than one core on a chip is all about the same idea. It's a lot easier to hit high transmission rates when your "wires" are one or two millimeters long, not 3-7 inches long.
While some computationally-bound applications do exist, most servers today aren't hurting at all for CPU speed, it's not at all uncommon to see a server hit it's performance limit long before the CPU's hit 100% utilization....with a better performance enhancement than multiple cores will give you for your average program-- which is still typically not going to be multi-threaded.
Well, these chips aren't designed for your average MicroShaft Office applications, are they? They're intended for high-load server applications, where the norm is to encounter not only multiple threads, but multiple processes all trying to get lots of CPU time.
steve
-- Oh, you're not stuck, you're just unable to let go of the onion rings.
Re:This makes a lot of sense.
by
NerveGas
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· Score: 1
Most people only need so much cpu power. Yet Moore's law continues to march onward.
Multicore processers are typically not so much for more overall computational ability, but to increase the bandwidth and decrease latency for communications between the two cores.
However, you're right, as higher density has been possible, the industry has been moving more and more to the fabled "SOC", or "System on a Chip".
We've already got motherboard chipsets that have pretty much every function built into them (IDE, graphics, network, etc.), and processers that have memory controllers built in.
Once it's economically advantageous, then we'll see more and more of that built into the processer itself, and eventually, yes, we'll likely have a system on a chip.
If I recall, Intel's Centrino chips already have wireless networking circuity built into them, don't they?
steve
-- Oh, you're not stuck, you're just unable to let go of the onion rings.
Re:This makes a lot of sense.
by
dcmeserve
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· Score: 1
Precisely one of the reasons that the Athlon is such a strong performer is because the memory controller is embedded into the processer, greatly reducing memory access latency. They certainly didn't go to all that work for nothing! And putting more than one core on a chip is all about the same idea. It's a lot easier to hit high transmission rates when your "wires" are one or two millimeters long, not 3-7 inches long.
Hum... your argument makes sense if the two cores actually needed to communicate with each other, but, from my understanding, that's not going to happen much, as they'll typically be running separate threads. Perhaps an application in which the threads need to sync up quite often would benefit; I don't know what's typical.
But if the two cores aren't communicating so much, then it seems as if it'd have the opposite effect: they're contending with each other for bandwidth to L3 and/or main memory. Even if that were alleviated by doubling the pinout (along with a matching doubling for L3/main-mem access, if that's possible), you still have the fact that you can't fit as much cache on the chip as you otherwise could. i.e. from the perspective of each thread, it sees another core sitting there on the chip where it might otherwise see additional cache.
If one of those cores ends up idle due to a non-threaded program running... well, you've effectively got a big hole in the chip where you might othewise have some nice, low-latency cache.
Not sure what you're saying about server applications; you kinda contradict yourself, in terms of how compute-bound the applications are. This is of course application-specific; the customer would have to evaluate the tradeoffs of having an extra core vs. bigger on-chip cache. Which is why you wouldn't design the architecture to necessarily have multiple cores; it's an option you can add to give the customers choice.
In terms of multi-core for desktop applications -- well, again you have to ask if most people would get more out of a bigger cache vs. another core.
Which I guess points to the advantage of the "virtual multithreading" or whatever the term is for what Intel added onto the Pentium recently: you then can make the choice in software; halve the cache and get two threads running at once (though they may still contend for resources in the core) vs. getting a full-size cache.
Ok, I've rambled enough for the moment.:)
-- "Orthodoxy is unconsciousness" - Orwell
Re:This makes a lot of sense.
by
NerveGas
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· Score: 1
Hum... your argument makes sense if the two cores actually needed to communicate with each other, but, from my understanding, that's not going to happen much, as they'll typically be running separate threads.
But if the two cores aren't communicating so much, then it seems as if it'd have the opposite effect: they're contending with each other for bandwidth to L3 and/or main memory.
If this were a P3/P4 core, I'd agree. However, the Opteron is an entirely different animal. Remember that each core has it's own memory controller. That means that they're working cooperatively for main memory, and you need high throughput between them. With each core that you add, you add another memory controller (and hence, increase memory bandwidth), but you need to be able to move those bits around.
Also, there is no L3 cache on these chips. Hopefully the chips are not sharing an L2 cache.
Not sure what you're saying about server applications; you kinda contradict yourself, in terms of how compute-bound the applications are.
No, I don't contradict myself at all. In a server environment, you tend to have a good number of applications (or threads) trying to get CPU time. If it's a web server, you tend to have multiple HTTPD processes and multiple CGI processes at once. If it's a database server, you tend to have many threads or processes (depending on the design model) working at once. Even on a file server, you have lots of NFS or Samba processes at once.
For a desktop system, a single fast processer is great. For a server, multiple cores is much better. As I've said before, it's rare for a CPU to be kept 100% busy doing computational work, usually I/O, high interrupts, or context-switches keep you from getting 100% out of your processer.
By having multiple cores on the same chip under this design, you get more memory controllers for more memory bandwidth, a bigger pipe between the cores to move that data around, interrupts can be balanced between the processers, and by having two processers, you only have to execute half of the context-switches, at least in theory.
For server situations where lots of programs are trying to get CPU time, this really does make a lot of sense. For desktop application, it makes very, very little sense. As for HyperThreading letting two threads run at once, it's not quite that simple, and it doesn't buy you a very large speedup. Under heavy DBMS loads, I've seen HT give performance deltas of anywhere from -1% to +3%. Nothing to write home about. : )
steve
-- Oh, you're not stuck, you're just unable to let go of the onion rings.
Shut up with the dog jokes.
by
GoofyBoy
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· Score: 1
Everyone knows that mountain jokes would be more funnier.
-- The surprise isn't how often we make bad choices; the surprise is how seldom they defeat us.
Re:Shut up with the dog jokes.
by
DrVxD
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· Score: 1
K 2, Brute?
(Or was that a bit classical for/. readers...)
-- Not everything that can be measured matters; Not everything that matters can be measured.
Re:Shut up with the dog jokes.
by
snatcheroo
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· Score: 1
Aren't you thinking of the mountatin K2?
Re:Shut up with the dog jokes.
by
Anonymous Coward
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· Score: 0
What about weed?
Re:Shut up with the dog jokes.
by
The+Cydonian
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· Score: 1
(Or was that a bit classical for/. readers...)
May be I'm the wrong demographic here, but I actually found yours funnier than these dog jokes. I mean, didn't quite get it why there should be jokes on dogs...
I need to study up on CPU architecture. Multi-core CPU's sound awesome, but I'm not sure what it means performance and price-wise. Anyone know of any good resources on processor architecture?
Re:I need to study up
by
Anonymous Coward
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· Score: 0
Sure, I remember one from my undergraduate days:
Campbell, Stephen A. Microelectronic Circuit Fabrication and Desigin, 3rd Ed. Oxford University Press, New York, 1998.
A little out of date now, but it has some good solid theory that should help.
As I understand it, part of the point of Source-Level cores (eg. like OpenCores.org) is to be able to synthesize multiple cores into a single chip and have them talk amongst themselves via standard internal interfaces. Eg. a chip contains a microprocessor, an implicit USB interface, and maybe has some hardware-accelerated DES encryption included as well. And OpenCores brings this capability to the common person.
-- Escher was the first MC and Giger invented the HR department.
Re:AMD? 2005?!?! Who cares? G5 Available *NOW*!
by
Anonymous Coward
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· Score: 0
Nice Troll
Well ZDnet kinda blasted RISC...
by
spitefulcrow
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· Score: 1
Yes, x86 is winning for traditional personal computers, but RISC is being used for a lot of smaller devices. Can you say Palm?
Also, last time I checked, IBM was still selling RS/6000 series machines with RISC-based CPUs.
It's not. The core of an UltraSparc or a Power4 look a LOT more like the cores of an Opteron or a P4 than they do an ARM. The CISC chips have become rather like RISC chips on the inside, while the high-end RISC chips have tended to get someone less "reduced" (ie more complex) instruction sets.
Gotta love the last part of the article
by
adaknight
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· Score: 1
"We've hit the memory wall," Weber said.
Still, the problems are not insurmountable. Moore's Law, which states that the number of transistors on a given chip can be doubled every two years, has a lot of life left in it, Weber said. Designers will likely continue to increase the number of transistors on a chip by stacking them.
LOL, this style of writing (the kind without any explanation whatsoever) is dangerously close to Scotty-speak.:) Gotta reroute power from the secondary warp plasma phase inducers because the relays are fused! We're gonna increase the number of transistors on a chip by stacking them!
-- hrm. then again. maybe not.
Re:Gotta love the last part of the article
by
Short+Circuit
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· Score: 1
If you'd kept up on current technology, you'd know that transistor stacking, and 3D lithography, has b een in the works for quite a while.
These specifications were left in an abandoned blue police telephone booth. A car, containing two extremely life-like miniature figures, a bicycle and a couple of flat tires were nearby.
Memory wafer technology (believed unstable in strong time winds)
Irritating speech synthesis unit, known to sound like an electronic version of Bungle from Rainbow
Extremely loud electric motors
On-board RADAR and SONAR
Retractable energy weapon
30 minute UPS
The introduction of multiple "warp" cores introduces a cross-space-platform technology for increased Trek throughput. Instantaneous natural language conversion, for instructions, will be done through a derivative of Babelfish, using the Redneck filter.
-- It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
Re:Rumored specs for the K9...
by
Chad+Page
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· Score: 1
Don't forget the wagging tail.
K9 Codename
by
Anonymous Coward
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· Score: 1, Funny
You mean Cerberus.
Cerebron is a medical term meaning:
A nitrogenous body, related to cerebrin, supposed to exist in the brain.
When shall we be free of the X86?
by
LWATCDR
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· Score: 4, Interesting
Folks we really do not need to run DOS applications any more. If we do couldn't we emulate them. I just do not believe that the IAx86 is the best IA for the future. The idea that in 30 years we will be runing some mutant 128 bit X86 chip makes my skin crawl. I guess I miss the days when new ideas where the norm for microcomputers. Rember when there was the 32032, 68020, TM990, Zilog z8000, the 6502 family, and the 88000? . How about it Transmeta? Let's see a version of Linux that does not run on top of the the translation layer. Lets get some new ideas out there I am betting bored. Now that I said that, GO AMD. While it is still X86 this is one of the more interesting ideas I have seen for a while.
-- See my blog http://ilovecookes.blogspot.com/ for light hearted technical information.
Re:When shall we be free of the X86?
by
adaknight
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· Score: 1
Well, remember that Bender is still using a 6502 as his CPU in the year 3000...
-- hrm. then again. maybe not.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
Folks we really do not need to run DOS applications any more.
Hey, I wanna play X-Com II: Terror From the Deep!
Re:When shall we be free of the X86?
by
gl4ss
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· Score: 1
** Folks we really do not need to run DOS applications any more.
Hey, I wanna play X-Com II: Terror From the Deep!**
however the stand is in reality that many(almost all) of those old games are better experienced in properly configured emulator(dosbox is ok for 16bit stuff.. though i'm kinda waiting for 32bit) even on a real pc! so really, the biggest miss would be few year old titles, not the 10 year old titles as they're already unplayable without tinkering on most modern systems(bunch of games wont run even on a pentium, and even larger number of stuff is timed to execution speed, so you need programs to slow it down at least, and those programs tend to suck).
-- world was created 5 seconds before this post as it is.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
I find most people that claim to be an open minded liberal are not.
Doesn't open minded mean that you weigh options on their merits, rather than through an ideological filter? (Answer: Yes.) Then isn't "open minded liberal" an oxymoron? (Answer: Yes, again...and thanks) Your conflating of open mindedness and liberalism is a common one, but, hopefully, your error is clear now.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
You're so incredibly ignorant it causes me pain. If you think that the ISA is the foundation of 'interesting ideas' in microprocessors you're one especially retarded monkey.
Re:When shall we be free of the X86?
by
SuiteSisterMary
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· Score: 1
dosbox is ok for 16bit stuff.. though i'm kinda waiting for 32bit
.60 came out yesterday, with the first go at supporting protected mode DOS progs.
-- Vintage computer games and RPG books available. Email me if you're interested.
Re:When shall we be free of the X86?
by
gnuadam
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· Score: 1
While it is still X86 this is one of the more interesting ideas I have seen for a while.
Good, because it's also part of the intel roadmap for the itanium.
-- You say:wq, I say ZZ. Why can't we all just get along?
Re:When shall we be free of the X86?
by
Dutchmaan
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· Score: 1
I think the term "open minded liberal" is kind of like saying "ATM machine".
Re:When shall we be free of the X86?
by
jhines
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· Score: 1
When one can get a userful, supported, takes industry standard parts, ATX motherboard, in the same price range.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
If, by open-minded you mean "no moral compass and open to any idea that floats along without thinking it through completely"... yeah.:-)
Re:When shall we be free of the X86?
by
Feret
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· Score: 0
AMD is on the right track and I will tell you why. By supporting 32bit x86 in the Athlong 64 they allow an easy migration to the new 64 bit instruction sets. Then at some point in the future they can start phasing 16 and 32 bit apps out because people will be running on win 64 and It would be more expensive to develop those less efficient apps. It certainly is better then having to force people at some point to just sqitch and incure the cost of new 64 bit software which will be VERY expensive to develop.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
No - by LIBERAL, I meant "no moral compass and open to any idea that floats along without thinking it through completely":)
Re:When shall we be free of the X86?
by
John+Courtland
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· Score: 1
I said this same thing a while ago, but instead of dropping the useless instructions for an emulator, (and correct me if they already do this), but put the shit like AAA (ASCII Adjust after Addition) or Enter, that no one uses and put those into an execution unit that executes a small program using the standard ops (like MOV, LEA, etc...) to create the effect of those less useful opcodes. That way the more commonly used opcodes are executed faster (as they don't have to be broken down into sub-programs), and backwards compatibility is retained (albeit at a price).
-- Slashdot is proof that Sturgeon's Law applies to mankind.
Re:When shall we be free of the X86?
by
akuma(x86)
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· Score: 1
I know this may be hard to hear, but let me break it to you gently...People will be running x86 100 years after I am dead. Blame IBM and Microsoft - the decision was made a few decades ago and there's nothing you or I can do about it. There's far too much software out there already built on x86.
Back in the 80s and early 90s, the ISA actually mattered. You could get a non-negligable performance boost with a good hardware-friendly clean ISA.
These days, the ISA just does not matter anymore. We have enough transistors to make the problem go away in hardware. The ISA is now a 2nd order effect in FP applications and a 3rd order effect in integer applications. Process technology, circuit techniques and microarchitecture are vastly more important.
x86 has been translated to hardware-friendly RISC micro-ops for many years now.
The complicated x86 decoder has been taken out of the critical path by caching decoded instructions in a trace-cache (Intel's method) or a pre-decoded instruction cache (AMD's method).
Brain-dead memory addressing is handled seamlessly in the hardware. Cache-line splits, segments, limit checks etc... All of this is run efficiently on the CPU. The Pentium 4 has a 3.2GHz 2-cycle L1 cache for Christ's sake. All of this done with x86 addressing by the way. Go to www.spec.org and tell me what the fastest CPUs are (Intel and AMD leapfrog each other every quarter).
Computer architects are free to change the underlying micro-ops from one design to another and still maintain the same programming interface so that everything works. The freedom to change the underlying microcode is infinitely useful, because process technology and circuits change over time. These changes necessitate changes in the instruction set! We can and do change the micro-ops and all of this is hidden from the programmer.
Code can be dynamically re-compiled IN THE HARDWARE - completely transparently. Transmeta does this in software. Intel and AMD do this in hardware. The key is to find the most efficient mapping of x86 to the underlying hardware. There are a million ways to do this - expect more in the future.
My last point is this - why should computer users care what the ISA is?
Does grandma care that her web browser runs x86 or Alpha?
Do you write assembly anymore? Do professional developers write assembly anymore?
Are you a back-end compiler writer? If you are, please work on gcc some more so it doesn't suck so much on x86:)
Programmers should want to move to the UPPER levels of the abstraction stack - witness the move to Java and other managed-run-time programming/platforms. The concept of the virtual machine is an implicit admission that the ISA doesn't matter. JITs and managed run-times are in their infancy. In time they will also re-write your code for you on the fly in partnership with the hardware so that the programmer can concentrate on design and robustness instead of performance tuning.
Re:When shall we be free of the X86?
by
ryanvm
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· Score: 1
They tried - it was Itanium, and nobody bit.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
Actually I learned in college that X86 really is'nt used past the PII of chips at least from the intel side. It's called RISC86 where the X86 instructions are thunked down into RISC instructions in the CPU. If that's still the case then if we trash X86 we could see some real performance gains IMHO. Just get MS and GNU and whoever else to rewrite their compilers and we're set. Let's step out of the 80s and into the 21st century.
Re:When shall we be free of the X86?
by
default+luser
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· Score: 1
No way, it's out! I wonder if they have x87 emulation support yet...
--
Man is the animal that laughs.
And occasionally whores for Karma.
Re:When shall we be free of the X86?
by
DickBreath
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· Score: 1
When shall we be free of the X86?
Folks we really do not need to run DOS applications any more.
Do you know why railroad tracks are the width they are?
On the other hand, being optimistic for a moment, I suppose that in some hypothetical future, technology may get to a point where an OS and the vast bulk of its applications could simply be recompiled using a retargetable compiler, and everything would just seem to work?
Technology aside, maybe also market forces might align and then this could happen. But at such a point, do most people even care how crufty their processor is? (Or how elegant it is?) Only the price. This computer is $49, that other one is $39. I'll buy the $39 computer. That other one with Windows is $129.
--
I'll see your senator, and I'll raise you two judges.
Re:When shall we be free of the X86?
by
gl4ss
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· Score: 1
like, i don't say this too often on slashdot, but WOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOO OOOOOOOOOOOOOOOOOOOOOT
i wonder if that'll get past the lameness filter. dosbox is one of the coolest(and practical) of emulators around! and it's also a project that helps being able to not hang on 10y platforms..
-- world was created 5 seconds before this post as it is.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
Are you a back-end compiler writer? If you are, please work on gcc some more so it doesn't suck so much on x86:)
Herein lies the flaw in your argument.
Re:When shall we be free of the X86?
by
jmauro
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· Score: 1
Here's a radical thought, just boot DOS and play the game. No emulation needed. The machine will stil lrun regular old DOS in 16-bit mode without a problem. It just won't mix 16-bit and 64-bit code together any more.
Re:When shall we be free of the X86?
by
scotch
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· Score: 1
Let's see, from MW, we have these objectionable definitions for "liberal":
Main Entry: 1liberal Pronunciation: 'li-b(&-)r&l Function: adjective Etymology: Middle English, from Middle French, from Latin liberalis suitable for a freeman, generous, from liber free; perhaps akin to Old English lEodan to grow, Greek eleutheros free Date: 14th century 1 a : of, relating to, or based on the liberal arts b archaic : of or befitting a man of free birth 2 a : marked by generosity : OPENHANDED b : given or provided in a generous and openhanded way c : AMPLE, FULL 3 obsolete : lacking moral restraint : LICENTIOUS 4 : not literal or strict : LOOSE 5 : BROAD-MINDED; especially : not bound by authoritarianism, orthodoxy, or traditional forms 6 a : of, favoring, or based upon the principles of liberalism b capitalized : of or constituting a political party advocating or associated with the principles of political liberalism; especially : of or constituting a political party in the United Kingdom associated with ideals of individual especially economic freedom, greater individual participation in government, and constitutional, political, and administrative reforms designed to secure these objectives
Yep, those are pretty horrible things. Good thing I hate liberals like a good Rush disciple.
-- XML causes global warming.
Re:When shall we be free of the X86?
by
red+floyd
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· Score: 1
Do you know why railroad tracks are the width they are?
-- The only reason we have the rights we have is that people just like us died to gain those rights. -- Cheerio Boy
Re:When shall we be free of the X86?
by
cfuse
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· Score: 1
Remember when there was the 32032, 68020, TM990, Zilog z8000, the 6502 family, and the 88000?
Hmmm, yes. Where are they now?
Whinge as much as you like about x86. It's here and it works. End of story.
Re:When shall we be free of the X86?
by
beerman2k
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· Score: 1
You've obviously never had to write a compiler.
Rewriting, retuning, rebuilding the whole world sucks. Rewriting, returning, rebuilding the tools that build the whole world sucks even more. New architectures cause work on the tools side before the new architecture can even be used. It's not something that you want to have to do over, and over, and over again.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
Uh, whats not quite true? Geeks like you are so eager to "correct" people that you don't even bother to read what they are saying first.
Nobody mentioned roman chariots, and even if he had, that is beside the point. Like x86, the standard railroad guage was chosen a long time ago, and probably for reasons that are irrelevant right now. But we are going to continue to use the same railroad guage because thats what everything is built for.
You are such a loser. No wonder you can't get a date.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
Sales of Itanium have exceeded Intel expectations. Plenty of people have bit. Moron.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
Fuck you.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
Yep, those are pretty horrible things. Good thing I hate liberals like a good Rush disciple.
You see, the problem here is that liberals in America do not stand for most of those things.
Individual freedom? Ha! Only if you agree with the liberals. If the liberals had their way, we would have no freedom to voice an opinion on morality or disagree with their biased opinions on social issues. Don't even think about publically announcing that you disagree with gay marraige or prosecuting drug dealers. Hell- we couldn't even voice our opinion that some black athletes have been overrated because the media really wants to see them succeed.
Economic freedom? Wait- why are the liberals always trying to raise my taxes then? They think they can spend my money better than I can, so they are taking that freedom away from me.
Greater individual participation in government? If you consider collecting a welfare check to be participating in the government, then I guess thats true.
Constitutional, political, and administrative reforms designed to secure these objectives. Hm, it seems to me that the liberal strategy at this point is to keep the economy as bad as possible for another year (or at least the perception of our economy) and undermine our foreign policy so they can win an election next year. Watch one of the Democrat presidential debates if you don't believe me. They have managed to posture themselves so they will benefit when our country fails. How selfish is that?
Re:When shall we be free of the X86?
by
akuma(x86)
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· Score: 1
Herein lies the flaw in your argument.
That's not a flaw in the x86 argument. It's a flaw in the compiler. There are good x86 compilers - most notably the Intel compiler and the compiler from the Portland group.
Re:When shall we be free of the X86?
by
Dun+Malg
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· Score: 1
Do you know why railroad tracks are the width they are?
But also not quite false. The only part that Snopes really refutes is the width of the SRBs for the space shuttle being related to the width of the railroad tracks. I normally find Sonpes' analyses quite rational, but this one is a bit weak. They poke a little at a few of the raher weak links in the original story, but the fact that the Romans made their chariot wheel axles a particular width and that width has remained essentially a de facto standard for many similar conveyances up to the present time. Even they say so themselves in the very article you link:
" This is one of those items that -- although wrong in many of its details -- isn't exactly false in an overall sense and is perhaps more fairly labelled as "True, but for trivial and unremarkable reasons."
Basically, in the case of the axle width, the Romans chose a standard and there was nothing to gain and much to lose (compatibility) for anyone who might choose another. Just take a look at Brunnel's wide-gauge railroad lines in the 1850's. The 7-foot wide rails required different cars and engines, couldn't be linked up to the larger network of narrow-gauge lines-- causing chaos at the stations with passengers dragging luggage from one train to the other. Even though Brunnel's trains were arguably better due to greater stability (wider base), the standard was already set and Brunnel's lines wre eventually replaced with narrow gauge. Same thing with the x86. There's too much inertia behind it.
-- If a job's not worth doing, it's not worth doing right.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
Ok, so what do you want me to do about it?
Don't whine to us, whine to the people that write the applications that most people use.
Lets get some new ideas out there I am betting bored.
Be my guest. It sounds like you have plenty of ideas, get some people together and go for it.
Re:When shall we be free of the X86?
by
anthonyrcalgary
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· Score: 1
um... no
RISC made a lot more sense when you couldn't fit a CPU onto a single die. You couldn't just throw transistors at it like you can now.
The internal architechture isn't and shouldn't be exposed to the outside. If it is, then compatability is broken each time they want to change it, and that simply is not an option. Compilers would never have a chance to get very good.
RISC binaries are a bit bigger, but the internal opcodes x86 chips use are absoloutely huge, like over a hundred bits per instruction. That would fill up the cache in no time, and memory latency and bandwidth would become a bigger problem than it is now.
-- When someone might yell at me, it has to be OpenBSD.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
ICC. Watcom.
GCC sucks, but that's a GCC problem, not an x86 problem.
Another demonstration of why the GPL can be terrible for a market. It's killed the other free compiler projects and we're left with very-far-from best-of-breed.
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
s/Brunnel/Brunel/
Re:When shall we be free of the X86?
by
Anonymous Coward
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· Score: 0
Those would be low expectations if Intel's statements about the 64 bit computing market are to be believed. Outside of a handful of high-end servers, the demand does not exist. Or so they say. Who's the moron again?
Re:When shall we be free of the X86?
by
gl4ss
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· Score: 1
no, what i was saying was that some games won't even then play on modern computers(and the syncing by execution speed problem still is there, which is a big problem particularly when trying to play ufo1 or 2 on 1ghz+ machines). quite a bit of games are not 'regular' strictly-by-the-books programs when it comes to pc hardware handling(partly because pc hardware differs a bit also from one to another, particularly the pre 386 and 386 era games).
..and believe it or not win2k/xp is actually better for running some old dos games than win98+dos on modern computers, some games that wouldn't even start or would fail mysteriously at some point run fine in win2k/xp's dos 'emulation'(more like virtualisation though) mode.
-- world was created 5 seconds before this post as it is.
Re:When shall we be free of the X86?
by
SuiteSisterMary
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· Score: 1
All I know is, it runs Quest for Glory 4 (which.58 didn't) PROPERLY (even the CD enhanced version, with John Rhys-Davies narrating!), and the digital sound is fixed in Quest for Glory 3. So I'm happier than I can comfortably be, especially since I'm at work, not at home playing.
-- Vintage computer games and RPG books available. Email me if you're interested.
Re:When shall we be free of the X86?
by
pmz
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· Score: 1
I just do not believe that the IAx86 is the best IA for the future. The idea that in 30 years we will be runing some mutant 128 bit X86 chip makes my skin crawl.
The RISC architectures went from 32-bit to 64-bit pretty smoothly. There is no reason they couldn't do the same for 128-bit, whenever 64-bit becomes too little. It took twenty years to exhaust 32-bit, so ubiquitous 128-bit is most likely not coming anytime soon.
Yep... the brain on the memory chip is called "Pinky".
Re:AMD? 2005?!?! Who cares? G5 Available *NOW*!
by
iamhassi
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· Score: 1
He meant the fastest at emptying your wallet
-- my karma will be here long after I'm gone
They're doing what now?
by
PaschalNee
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· Score: 3, Informative
For those of you who live mainly in the software world (myself included) there's a very good overview of all things CPU on Arstechnica. Detailed enough to be interesting but starts at a basic enough level.
And remember than nothing impresses the ladies more than sombody who knows why multiple cores might be interesting
Re:They're doing what now?
by
Yaa+101
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· Score: 1
what kind of ladies do you meet?!?!?!
Re:They're doing what now?
by
Anonymous Coward
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· Score: 0
I hate police dogs but I really know alot about software!! I never saw this new K version 9 thing but I know that the new Gnome G6 will do it much better!
-damn wehre is the spell checker.
Operating system license pricing?
by
yerricde
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· Score: 0, Flamebait
The biggest feature [of AMD's K9] will be that it contains multiple cores.
And if K9 technology ever trickles down to home users, how are they going to afford Microsoft's asking price for licenses of multiprocessor compatible versions of the Windows OS? Or will AMD contribute to Wine to get legacy (i.e. Win32) apps to run on an affordable operating system?
Re:Operating system license pricing?
by
Svet-Am
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· Score: 1
they're not quite in the same basket, though. With Intel's hyperthreading, there is still only one core, but it just uses queueing, etc. to execute multiple threads. With AMD, we're looking at physically having more than one real core on one slab.
Further, according to MS, the definition of 'cpu' is based on the number of cores located on the package. I.E., according to MS, one core == one cpu ==> one license. It'll be interesting to see how this plays out.
-- [move.sig! for great justice, take off every.sig!]
Nice, but were are the better designs
by
darkstar949
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· Score: 1
This is all well and good, but I would like to see a better architecture than x86 be developed and put on to the market or better system of storing temporary data, than I would a faster chip. Also, as the article states:
"We've hit the memory wall," Weber said
I have meet a lot of people that I work with that are under the impression that their computer is running slow because the processor is slow and when I look at the system information they only have 128MB of RAM.
Basically, I think that the way to go is not necessarily faster, but better designed systems all together.
Having taken a system architecture and currently taking a compiler course, I found out that the x86's low number of register is such a drag. When will this end??? People bitched at MS for building Windows on DOS, maybe we should bitch at chip companies for building new chips on old architecture?
Re:When will it end???
by
The+One+KEA
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· Score: 2, Informative
It's only a drag when operating in x86 Legacy Mode on an AMD64-based core. When you're operating in x86-64 Compatibility Mode or x86-64 Long Mode, you get access to sixteen 64-bit registers. Here's a graphic which explains it quite nicely: http://www.devx.com/assets/amd/5929.gif
The rest of the article explains the concepts of the AMD64 architecture. Link: http://www.devx.com/amd/Article/16018
-- SCREW THE ADS! http://adblock.mozdev.org/
Proud user of teh Fox of Fire - Registered Linux User #289618
Ironicly, these deficits in the x86, non-orthogonal instruction set and a paltry 4 "General Purpose" registers, have forced x86 cpu makers to develop advanced techniques.
One thing most people recognize is that CISC design allowed mem to mem streaming copies. And that has a performance advantage such that even RISC designers added similar instructions, even though it violates the LOAD/STORE doctrine.
Another issue where CISC design benifits performance is that the instruction stream is smaller. Given the growing difference between cpu and memory speeds, saving instruction fetch times helps. You can think of CISC instructions as a customized compression of the instructions, and the ubiquitous conversion of x86 to "mircro-ops" (which are very RISC-like) in AMD and Intel cpus as the decompression phase.
Lastly, the dearth of registers forced x86 cpu designers to create and optimize speculative execution with "shadow" register sets. If you only have 4 registers it is relatively (to 32 registers) cheap to create seperate register sets you can switch back to if a speculative branch fails. RISC developers are behind in speculative execution techniques because shadowning 32 registers was an expensive technique to develop. Now with 16 64bit registers in x86-64, which can be individually addressed at 32 32bit registers, x86-64 doesn't have the register starvation problem. I read some study that showed that you reach diminishing returns performance-wise with more name 20-30 registers.
It is ironic that a shitty ISA like x86 has become an performance advantage 20+ years after it's original design.
-- --
I am not a fanatic, I am a true believer.
Re:When will it end???
by
Anonymous Coward
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· Score: 0
Oh, wow, sixteen registers! An embarrassment of riches! All of that RISC crap like the MIPS architecture can just hang their head in shame!
the timing isn't all that bad
by
snatcheroo
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· Score: 1
I've noticed a few people respond already that multicore processors should've have been around sooner and what not but I think the timing isn't all that bad. Consider the amount of extra heat that multicore processors may generate. Water cooling products are one the rise and I'm betting that they'll be common place (or at least on the verge of being the norm) by 2005, if not sooner. That could work out well for AMD's new chips, especially remembering some of the heat problems they've faced in the past.
That said I think multicore AND watercooling should have been around way before they are.
Smaller instructions == less memory bandwidth
by
yerricde
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· Score: 1
Folks we really do not need to run DOS applications any more. If we do couldn't we emulate them.
Such emulation is feasible, as shown by DOSBox and Bochs. Have you donated yet?
The idea that in 30 years we will be runing some mutant 128 bit X86 chip makes my skin crawl.
Having a small instruction coding saves on instruction memory bandwidth. An x86 (Intel) or Thumb (ARM) instruction may weigh in at about 16 bits, while an Itanic instruction is a massive 128/3 bits.
I want an opteron right now as well:/ thing is, isnt intel planning to release a 7 ghz cpu in that time frame as well?
they better have a good plan for that.
shouldn't we be able to print our own CPUs by then
by
Anonymous Coward
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· Score: 0
I mean, c'mon just d/l the MegaCore.PDF image of the cpu you want to print, and pow...out it comes from the Canon CorePrint(tm) Silicon Bubblejet.
Gimme a break. STILL BUYING processors in 3 years!?!? No way! Ha!
I'm worried about Moore's Law...
by
johny_qst
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· Score: 1
That little quote at the end of the article has me worried.
" Designers will likely continue to increase the number of transistors on a chip by stacking them." What is the density of transistors going to do for the problem of generating too much heat when they are getting layered in the third dimension? Can I begin to expect the need for a cooling tower outside my apartment to handle the job of heat exchange?
-- Fnord.sig
Hey Geeks, stop making bad dog jokes for a sec..
by
Anonymous Coward
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· Score: 0
and explain to me WTF this means. What is an extra "core" in a CPU chip?
The 2 on-chip cores would still share the L2 and actually have the same memory controller. That would in fact allow them to keep the packaging very similar (most of the external interface - memory and I/O - should be roughly the same)
Furthermore, Hypertransport is *not* simple. As a point-to-point interconnect, maintaining cache coherency is not so easy... But I think they have figured this out already.
Nowadays the instruction decoder is such a small
part of the chip, you could easily afford to put
on two of them. Then, it would be easy to
transition customers to a better instruction set,
by supporting both simultaneously. A system based
on such a chip could run programs for both, but
the programs recompiled to the new instruction set
would be faster because they can make better use
of all the parts of the machine.
People building for that target would naturally
use the mode that produces the faster code.
Of course the OS would be compiled that way,
too. Only code for which speed doesn't matter
(i.e. most commercial programs) would still
be built to the old target.
The new instruction set could not be designed
entirely de novo, because it would retain
some details needed to get access to peculiarities
of the x86 machine. However, it could be very
much cleaner, and easier to generate and
optimize, than regular x86.
As I understand it, it's just an extension to the existing
instruction set, with the same sort of prefix bytes that
you see in the 8086->80386 16-bit->32-bit extensions,
and convoluted ways to get to the extra registers. In
other words, there's no "mode bit", so it can't be as
clean as it might be, because it still supports all the
old instructions in the same instruction stream.
In all likelyhood, the K9 will be based on AMD's x86-64 instruction set, the same as the Opteron and Athlon 64/FX. x86-64, as far as I know, looks pretty much like a regular CISC x86 cpu at the assembly level, just with intruction and data blocks that are twice the size (it's even natively binary-compatible with regular 32-bit x86 code).
A good comparison here is Sun's SPARC line of RISC processors. The original SPARC chips were 32-bit, then Sun introduced the UltraSPARC, a 64-bit version of the same architecture that retained binary compatibility, but could be programmed in 64 bits as well.
Hell, those of us who are old enough remember when x86 was only a 16-bit architecture (80286, anyone?). The 386 was the chip that made the transition, and it, like the K8, was fully backwards compatible and programmed very much like its predecessor. Incidentally, Linux was a fully 32-bit OS in 1991, and Windows only got there with NT, and not on the desktop until::shudder:: XP (and before someone says it, Windows 9X wasn't a fully 32-bit OS. It was enough to break compatibility with 16-bit processors, sure, but a lot of the system was still implemented in old-school 286-style assembly). Nowadays, Linux already has mature ports on a bunch of 64-bit platforms, including the two x86-ish ones: ia64 and x86-64. Windows users can have fun waiting for 64-bit XP to crash their systems up to 4 TIMES FASTER. Hooray!
-- Anonymous Luddite: "What do you think of the dehumanizing effects of the Internet?" Andy Grove: "Not Much."
Re:Probably Means x86-64
by
Anonymous Coward
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· Score: 0
Since when is IA64 x86-ish? The only thing IA64 and x86 have in common is their parent company, Intel.
IBM is already there ;)
by
Anonymous Coward
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· Score: 0
PowerPC has already done that
by
mnmn
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· Score: 1
Versions of PowerPC comes with 2 and 4 cores. Playstation3 is already being designed with cell processors. Seems like we'll hit the clockcycle limit, already have hit the bits limit to 64-bits (128 bits will never be practical) and shrunk the die to have each wire 5 atoms wide. The next logical step is to increase the number of cores, maybe incorporate the memory itself (maybe 128MBs of it) at full core speed on the same die, maybe incorporate the GPU on the same die and start going vertical.
I think for now moore's law will be bent and we'll see the slowing down of processor development, until they bring in quantum computing when the processor performance will spike up and correct the moore's law line.
-- "Give orange me give eat orange me eat orange give me eat orange give me you."
-Nim Chimpsky
Re:PowerPC has already done that
by
Anonymous Coward
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· Score: 0
You should to your research.
Saying that 128 bit processors will never be practical is like when Bill Gates said that no one would ever need more than a few dozen kilobites of memory.
The smallest wires anyone ever even thinks about using in microprocessors are.9 micron, or 90 nanometers. Atoms are generally around.1 nanometer in diamiter, so the very smallest wires are about 900 atoms thick. That is a few more than 5.
At this point in time, incorperating 128mb of memory, especially at 2ghz+, into a processor would be ridiculously expensive. Prehaps eventually, when memory is cheaper, this would work.
Incorperating the GPU on the same die is an amazingly stupid idea. High end GPUs require a much larger die area than CPUs, require a lot more power. This would only make the core generate a LOT more heat, and would not create ANY performance improvements. Because of the ultra-high memory bandwith requirements of video cards and the relatively low front side busses of processors, this would infact signifigantly slow down the video card. It would be similar to having a onboard video card integrated into the north-bridge.
Integrating things that dont need to be in the core into the core is not practical. Increase in core size makes manufacturing costs skyrocket, which in turn makes it more expensive for consumers.
People have been saying that moore's law will end for ages. Do you have any good evidence that this is the case? Quantum computing is still years and years away from even existing in a prototype form, much less hitting consumers.
Re:PowerPC has already done that
by
Courageous
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· Score: 1
At this point in time, incorperating (sic) 128mb of memory, especially at 2ghz+, into a processor would be ridiculously expensive.
Well, yes. However, not: On-chip memory does not have the same space requirements as on-chip cache. This is what they called eDRAM (embedded DRAM). There is a rumor that the NV40 will have 16MB on chip eDRAM. So, while 128mb on-chip *now* isn't currently viable, it's really not that far away, either. Expect it to be an on-board L3 with relatively high-latency (when compared to cache), but with phenomenally better bandwidth and latency than access across the bus/system link.
C//
Re:PowerPC has already done that
by
Anonymous Coward
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· Score: 0
" Playstation3 is already being designed with cell processors. "
Not true.
There were some early reports that it was, but it turned out not to be viable.
Re:PowerPC has already done that
by
Haeleth
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· Score: 1
> already have hit the bits limit to 64-bits (128 bits will never be practical)...
Well, maybe - but don't you remember when they said that about memory?
Re:PowerPC has already done that
by
DerPflanz
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· Score: 1
128 bits will never be practical
Depends on what you want to do. Philips has a 128 bits VLIW processor called TriMedia (I believe). Never say never.
-- --
The Internet is a too slow way of doing things, you'd never do without it.
AMD to debut Montecore CPUs in 2005
by
BJZQ8
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· Score: 1
As a famous nerdy guy (no, not Bill, the other one, starts with an L) once said, what some people see as x86's weaknesses are actually some of its great strengths, and if you design a very elegant architecture and then start optimising it for the real world, you might be surprised to end up with something that looks a lot like x86.
AMD-64 (x86-64) addresses some of the main problems of x86 (namely the small number of registers). Since virtually no-one codes in assembly anymore, and as long as the compilers are able to produce fast code, who cares if the architecture / instruction set is "elegant" or not? IA64 is "new" and "elegant" and most people I know who work with it say it's hell to work with. Compilers can't optimise, coding by hand takes forever, etc..
AMD-64 (x86 with 16 64-bit GP registers and 16 128-bit SSE registers) sounds like a good thing to me. Backwards compatibility also sounds like a good thing to me (I want my kids to see Ultima VII;-).
Re:Do we want to?
by
Anonymous Coward
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· Score: 0
A clean break would also help with the 64-bit transition.
Optimizing an elegant architecture for the real world without making a mess shouldn't really be that hard. The Alpha lead in performance as long as it had the financial backing...by the time it fell behind, it was pretty much abandoned.
Re:Do we want to?
by
Anonymous Coward
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· Score: 0
IA-64 elegant? You must be, as they say in the classics, shitting me.
Its VLIW plus every fuckin' trick in the literature to attempt to speed it up!
Re:Do we want to?
by
Anonymous Coward
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· Score: 0
It's also important to note that even when the Alpha was the undisputed speed king, it was designed and produced by a small team and a tiny budget compared to what Intel and AMD had to use to reach any kind of performance. Of course, x86 grew so much more popular than any competing architecture that they could afford to overcome the weaknesses of the architecture... and by now, when every processor has oodles of functional units idle waiting for memory, it isn't really the instruction set that's the bottleneck.
Re:Do we want to?
by
Anonymous Coward
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· Score: 0
Perhaps the poster meant elegant in the "interesting, but not functional" sense. Like a gold-plated sneaker. Or a cool but otherwise unimplementable idea. Hats off to AMD for getting x86 to 64bits, by the way.
Re:AMD TimeLine to Let's see...
by
snarkh
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· Score: 1
Let's see... AMD missed the original launch date of their Barton core CPU's by at least 3 months, missed the launch date of the Opteron by over 6 months, and the original launch date of the Athlon 64 by almost a year.
Ah, that's nothing compared to the Itanium.
1998-->2001 if I remember correctly
Re:AMD TimeLine to Let's see...
by
Anonymous Coward
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· Score: 0
Ah, that's nothing compared to the Itanium.
1998-->2001 if I remember correctly
And that first one hardly counts.
And a serious comment...
by
jd
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· Score: 3, Interesting
"Multiple cores" is meaningless, with today's microprocessors. Typically, there will be multiple execution units for common instructions. Pipelining, pre-fetch and branch prediction all increase performance by more than can be obtained by using antiquated SMP-style approaches. It's far more important to distribute the bus load over time, as that is the larger bottleneck.
By having multiple register sets within a single core, and tagging requests/results, you can avoid the complexity of SMP entirely, while producing the effect of having multiple processors.
If you want to go further, improve the support for internal routing of operations. Thus, if you've instructions operating on the same data, the data can be directly sent from logic element to logic element. The entire chain could then be executed as a single instruction (albeit composite). This also eliminates the need to have a CISC-to-RISC layer in the processor, as complex instructions would be mapped by routing commands and not by multiple internal fetch/execute cycles.
By adding input/output FIFO queues to each instruction, where each node in the queue tagged the "virtual" processor associated with that instruction, the CPU would be limited in the number of CPUs it would look like only by the number of bits used in the tag. (eg: An 8-bit tag gives you 256 virtual CPUs on a single die.)
Why is this better than "true" SMP? Because 2 CPUs can't run a single thread faster than 1 CPU. Programs are generally written with single processor systems in mind, and therefore cannot run any better when the extra resources exist.
Sub-instruction parallelism allows you to run as fast as you can fetch the instructions. Because the parallelism is merely at the bookkeeping level, there's no overhead for extra threads.
Because the logic elements would pull off the queues, as and when they were free to do so, there's no task-switching latency.
Because the parallelism is sub-instruction, and not at the instruction block or thread level, more of the resources get used more of the time, thus increasing CPU utilization. It also means that tasks that aren't parallel at a coarse-grain can likely get some benefit, as there may well be parallelizations that can be done at the element level.
Because a single, larger die can carry with it more useful silicon than two or more seperate dies. (Which is likely why AMD are using multiple cores in their K9 CPU.)
AMD's approach is an improvement over the seperate CPU schema, but it's nowhere near the potential an element-cluster could provide. The parallism that can be gained is way too coarse-grain. It'll offer about the same level of improvement the move from seperate 386 and 387 chips to the 486DX did, for much the same reason. Reduced distances and reduced voltages allowed for faster clock rates on the same technology.
But engineering at the right level will always produce better results than cut-and-paste construction, even if it does require more thought.
-- It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
Re:And a serious comment...
by
Courageous
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· Score: 1
"Multiple cores" is meaningless, with today's microprocessors.
Not really. It has to do with managed atoms of complexity. You create this complex thing, give it well-understood interfaces, and connect it to other identical things. There is more than just pure technology involved. There is an issue of managing complexity. One advantage of the single core/ multi core approach is a sort of conceptual "assembly line," where your cheap product is the least atom, and your more expensive parts are compositions of those atoms.
C//
Re:And a serious comment...
by
Scorpionad
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· Score: 1
"Programs are generally written with single processor systems in mind, and therefore cannot run any better when the extra resources exist."
This is an OS problem not an architecture problem. Linux kernals already exist that can "SMP enable a non SMP" program through kernal ajustments across hundreds of "nodes" with the program none-the-wiser. AKA "openmosix"(opensource) or "mosix"(proprietary)
Re:And a serious comment...
by
drinkypoo
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· Score: 1
"Multiple cores" is meaningless, with today's microprocessors.
This is only true in a single-tasking environment. At the very least something like hyperthreading is called for, because it minimizes the amount of context switching. There are things you can do to mimize the cost of a context switch, but reducing the number of context switches gets the job done as well. Having multiple cores accomplishes this goal, as well as increasing the number of functional units.
-- "You're right," Fisheye says. "I should have set it on 'whip' or 'chop.'"
my guess is that the processors are already sitting on a shelf in a warehouse somewhare and for the next two years they'll be working on the bandwidth issues between RAM, L2 cache, L1 cache, and the CPU, as well as a few other minor things to tweak the hell out of X86-64 and basically make such a processor worthwhile!
-- Error 666 - SCO source has been found in your Linux kernel. Please remove it. Formerly kdsolutions
Re:And a serious comment...
by
Karadryel
·
· Score: 1
The short response is "don't you think they would have thought of that?"
Of course, they undoubtedly did think of it, so why do they believe that this is the better way to go?
What you're saying is all true, to a point. Adding additional resources to a single logical processor is extremely effective, but only up to a point. The distinction is between instruction-level parallelism (ILP) and thread-level parallelism (TLP). The key observation is that in "normal" code (meaning we're ignoring the high-performance scientific stuff because that's a different workload to optimize for), there are only so many instructions within a basic block (the instructions between two branches, like if or while statements), before you hit a branch or a jump or the like. You can add resources until you can execute all those instructions within a single block at once, but doubling the chip resources beyond that doesn't help as much.
Now, you add in branch prediction. When we hit a branch, we execute one side of the branch in the hope that that'll be the taken one; that gives you more instructions to have in-flight at once. But note that the resources added there are less effecient, because there's always some probability that the branch will go the other way and the chip will have to discard all that work.
Anyway, you can continue this until you're executing many basic blocks at once, but with diminishing returns - if you mis-predict a branch, you've lost work (sure, you can execute both sides of the branch simultaneously, but there you're just guaranteeing yourself a max of 50% efficiency overall).
The point is just that at some point the benefits of adding additional resources to the chip starts to tail off, and it becomes more beneficial to add ways to run multiple threads at once, either through hyperthreading (which arises out of this same realization, because usually one thread won't use all the chip resources of a physical processor) or multi-core.
"By having multiple register sets within a single core, and tagging requests/results, you can avoid the complexity of SMP entirely, while producing the effect of having multiple processors."
No... keeping all the execution units of a CPU busy all the time is hard, and there's a limit to how much you can do. Hyperthreading is perhaps the more elegant solution, but it has its problems too. It tends to thrash the cache with certain algorithms, and the scalability is limited.
Adding a core increases instruction throughput a lot without adding (too much) complexity, and whatever you might think complexity makes things really tough. It's simply cheaper to throw more cores at the problem.
Another thing you don't consider is that signal propogation delays are a very real problem in todays CPUs. That's only going to get worse. Some way to spread out intependant operation must be used to keep things running fast.
-- When someone might yell at me, it has to be OpenBSD.
Well I think that you treat a bit lightly the complexity of the "issue unit", if you want to have the maximal single thread performance, a 'single issue multiple units' makes sense, but every "brainiac" CPU usually has some limits on the way it can reorder the instructions, otherwise it would become too complex.
Look at the PPC970, it is a deep and wide CPU: it has so many instructions in flight that it packs the instructions into bundle, and sometimes some slot can be unused because of the limitations of the issue unit.. A multi-core CPU simplifies the logic of the issue unit: the Power5 is going to be SMT and SMP..
You are right that now many applications are programmed with the single-threading model, but in a few years, even entry-level CPU will be SMT (hopefully with less bottlenecks than the current P4) or SMP, so multi-threaded applications will gain a *big* advantage..
Re:And a serious comment...
by
bobbozzo
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· Score: 1
I don't think so. http://openmosix.sourceforge.net/ says: "Pr ocesses originating from any one node, if that node is too busy compared to others, can migrate to any other node. openMosix continuously attempts to optimize the resource allocation."
"The cluster behaves much as does a Symmetric Multi-Processor, but this solution scales to well over a thousand nodes which can themselves be SMPs."
In other words, one single-threaded program will still only run on one cpu. There is no advantage unless you have LOTS of programs running at once.
-- Nothing to see here; Move along.
That martian better watch out
by
Anonymous Coward
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· Score: 0
that wascally wabbit thwarts that martian and his K9 every time
Yet AMD Marketing will never use that name.
by
pr0ntab
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· Score: 1
Do you hear anyone referring to AMD64 as "K8"? I hear AMD64, x86_64, Opteron, Athlon64, but never K8 (maybe once or twice, to relate how similar the FX, Athlon64 and Opteron are)
So we'll call it K9 in the same way we call PentiumPro/II/III all i686. And no one will get the dog jokes, except us, and maybe 4 readers and 1 of the creators of Penny Arcade.
How sad.
-- Fuck Beta. Fuck Dice
Re:Yet AMD Marketing will never use that name.
by
Down8
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· Score: 1
Quite a few motherboard makers use "K8" in some of their products for the aforementioned CPUs, and VIA's chipset for the CPUs is called the K8T800.
And K8 is more likened to P3, P4, etc., than to i686, as it is a code for a certain generation of chips within a company, not an architecture, per se.
Re:Hey Geeks, stop making bad dog jokes for a sec.
by
randomencounter
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· Score: 1
Short form: 2 CPU's in one package. In this case
on one chip.
-- Forget diamonds, copyright is forever.
Of course this all hinges on....
by
inteller
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· Score: 1
....the breakthrough development of cold fusion power supplies in an BTX form factor.
And a liquid nitrogen cooled case.
Hi! '95 called,it'd like its prevailing logic back
by
pr0ntab
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· Score: 1
Everyone has now given into the fact that you need more complexity to get higher performance per clock.
Evidence of this: The multiple-logical-core (see Aurora, Intel HT, EPIC, Power5) trend is the next step in complexity beyond pipelining and predictive execution/caching.
-- Fuck Beta. Fuck Dice
Re:Hey Geeks, stop making bad dog jokes for a sec.
by
JavaLord
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· Score: 1
2 CPU's in one package. In this case on one chip.
What is the difference then from just having a duel processor system?
I bought two computers for the price of your one computer, and I can invite a friend to play Unreal Tournament with me.
Ahhh, yes, LAN party.
What were you talking about?
-- Fuck Beta. Fuck Dice
GNU Community can Help AMD
by
reporter
·
· Score: 1
What is becoming clear is that the platform of choice in
the engineering community is
Linux running on top of either x86 chips or Power chips. The
GNU community could help AMD by restricting the GNU compilers to
using only an efficient subset of the x86 instruction set when
they generate code. The compilers specially developed by
Intel do just that in order to speed applications.
The benefit here is that AMD can focus on performance-boosting
only those instructions that the GNU compilers will use. The
new K9 only needs to be able to execute the remainder of the
instruction set, regardless of speed.
AMD has a tough task. The K9 must execute the legacy x86 instructions,
the MMX instructions, the SSE/SSE2 instructions, the 3DNOW!
instructions, and the x86-64 instructions. This will be a debugging
nightmare.
Re:GNU Community can Help AMD
by
jdhutchins
·
· Score: 1
This is kinda unethical. Open-Source ISN'T about helping a company out. AMD could help, but having gcc be 'biased' towards a company isn't the open-source philosphy. If RMS saw this, he'd have a panic attack.
However, people are welcome to write gcc backends to optimize for the K9. AMD could even write them, and if they were open source, they'd be used. You also mention 'for an efficient subset of x86', but gcc compiles for more than just x86.
Optimizing gcc for amd isn't a bad idea, but we're not locking ourselves into amd products.
Re:GNU Community can Help AMD
by
vandan
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· Score: 1
I wouldn't go that far.
AMD processors make sense for most people. They're cheaper and faster. Therefore no-one can make much of an argument against buying them.
But keep in mind that AMD is not a perfect company from the consumers' point of view.
AMD have expressed interest in supporting the TCPA by building hardware that only runs signed and authorized software. This can't be good for Linux, or any other OS apart from Windows.
AMD also withheld *very* important information from Linux developers regarding an AGP bug that was reported to Microsoft 18 months before a Linux developer stumbled across the details. Who remembers having to pass the 'mem=nopentium' option to the kernel as they booted?
AMD are great for us now in their current position - they encourage competition and create innovative products ( MS take notice ). But give them an inch and they'll take a mile. We'd all be better off if we could simply keep all companies in healthy competition with each other. OK, maybe reward those who offer consumer-friendly products ( eg no TCPA ), but I wouldn't go out of my way to penalize others.
Re:GNU Community can Help AMD
by
Anonymous Coward
·
· Score: 0
You misunderstand. A typical compiler like "gcc" already compiles to several instruction sets: Power, x86, SPARC (ugh), etc. The proposal is simply to restrict the x86 generated code to an optimal subset of the x86 instruction set. The proposal has no effect on support for the other languages.
By the way, "gcc", by default, already restricts SPARC generated code to the SPARC V7, which is a subset of SPARC V9. You must specify certain flags to direct "gcc" to generate SPARC V9 code.
Re:GNU Community can Help AMD
by
swillden
·
· Score: 1
AMD have expressed interest in supporting the TCPA by building hardware that only runs signed and authorized software. This can't be good for Linux, or any other OS apart from Windows.
Wrong. It's can be very good for Linux and every other operating system, or it can be very bad.
It all depends on who holds the signing keys. If the owner of the machine holds the keys, TCPA will be a powerful tool for creating more secure systems. Where it gets dangerous is if the hardware manufacturers hold the keys.
-- Note to ACs: I usually delete AC replies without reading them. If you want to talk to me, log in.
I can just see the advertisement now...
by
acidrain69
·
· Score: 1
A big bulldog with AMD painted on it's side marches up to a pile of P4's and urinates on them.
-- -- Having a Creationist Museum is like having an Atheist place of worship
Re:Do we want to? - UltimaVII
by
Anonymous Coward
·
· Score: 0
Get Exult. It is an open source, reverse-engineered implementation of the Ultima7 game engine. I've been using it for a couple of years now. Makes it even better than the original version!
AP Newswire, Aug 14, 2007: In a paper published in the journal Science, MIT researchers announced the achievement of a sustained nuclear fusion reaction. This stunning accomplishment was, oddly enough, purely accidental, triggered by the failure of the cooling system on MIT's new AMD-K9-based 256-node Beowulf cluster, which had gone into full operation only a week prior to the event.....
-- Life is like surrealism: if you have to have it explained to you, you can't afford it.
Re:Jealous
by
Anonymous Coward
·
· Score: 0
The funny thing about reading sorted by "highest scores first" is that this kind of post appears right near the end (!)
Another stupid dog joke ..
by
ciupman
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· Score: 1
sit ubu, sit.. good proc!!
Oh my god.. this might be the worst of them all;D ehehe
-- I fuse with Mercer every single day...
I know this has been said countless times, but...
by
Knights+who+say+'INT
·
· Score: 3, Informative
Why do I need -more- processing power?
I don't do any 3D rendering, but I believe I do more processor-heavy work than the average Carlos - sp. big numerical differential equation and bigbigbig linear optimization stuff in Maple - and my tienda-de-descuentos K6-II still crunches the stuff faster than I could ever desire.
The main problem with personal computers is that they use hard drivers for memory swap space when they should be using RAM memory to cache for hard drives.
If I could spend $500 on my computer right now I'd fill it with as much memory as the architecture allows. I'd then run a ramdrive and direct many of the computer activities to there.
I mean, when a webpage opens, a banner is downloaded to my hard drive. That's just irrational. And it prolly wears the hard drive's physical mechanism faster too.
But then again, we don't have a benchmark of ram speed, nor do we have hypemakers touting new, faster RAM. And prolly there's not too much activity in technologically improving RAM either.
Multiple Cores
by
Anonymous Coward
·
· Score: 0
With multiple cores, This thing should be able to process as fast as a pack of scalded ass dogs!;)
This is usually how the story goes:
1. AMD announces new processor to rock all intel processors.
2. Intel waits about a year, then unleashes a huge add campaign (aka centrino) about a previously unannounced project.
3. AMD is once again on the backburner
4. Skip the.....
5. Profit for Intel.
Stacking CPUs
by
Anonymous Coward
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· Score: 0
When will AMD make available Stacking CPUs for N way systems. Intel first again?
-- The Web is like Usenet, but
the elephants are untrained.
K9?
by
Anonymous Coward
·
· Score: 0
Wow, wow!
Funny but Sun Microsystems
by
Anonymous Coward
·
· Score: 0
Stated the same thing the otherday
They've been doing that since 1995
by
pr0ntab
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· Score: 1
With the pentium pro, K6, etc.
No operation is directly executed anymore, it's all interpreted.
-- Fuck Beta. Fuck Dice
Re:They've been doing that since 1995
by
John+Courtland
·
· Score: 1
I know that, I mean that they should directly operate only a RISC-like architecture, then force the less used opcodes into microcode, basically using the RISC architecture to run the other opcodes.
Like we all know Enter is
push ebp
mov ebp, esp
So then let's say push and mov are both opcodes directly run, when the processor encounters Enter the decode unit will break it down into its RISC equivalent for the execution unit.
-- Slashdot is proof that Sturgeon's Law applies to mankind.
How about it Transmeta? Let's see a version of Linux that does not run on top of the the translation layer.
AFAIK, the translation layer of Transmeta CPUs is a good thing, as it can optimize the code on the fly. There is a cache for translated code, so this will mostly benefit repeating stuff like scientific computing.
However, I completely agree with your point of discarding x86. Switching to a different CPU seems like the least hardware issue, at least with Linux and BSDs. Unfortunately things are different for the masses that use closed source. Besides, my next computer will probably be an x86 anyway as I can't afford anything technically superior.
-- Escher was the first MC and Giger invented the HR department.
K9? They're all the rage in Trenton, New Jersey.
by
merriam
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· Score: 1
Re:I know this has been said countless times, but.
by
Slack(er)ware
·
· Score: 1
I suppose big is a relative term, but if your K6-II solves differential equations faster than you desire then your system can't be *that* big. I've run semiconductor process simulations that took 2 hours on a SunBlade 2000...
Also, I must defend the memory manufacturers: there is a tremendous amount of R&D that goes into RAM every year. The focus is just on density rather than speed.
Forget about all the processing you could do with multiple cores. Based on the current trend of AMD chips, you could use this baby to heat your home.
It renders movies, it roasts meat, it's an all-in-one appliance.
FORGET all those other processors.
LOOK at this P4, it gets barely warm enough to melt the cheese on this burger [insert picture]. Now look at the K9: not only are you grilling that cheeseburger, but with that Texas-sized heat sink and those multiple cores, there's enough room and heat to grill 4 ears of corn.
Order your K9 today while supplies last. Operators are standing by.
-- Well, there's spam egg sausage and spam, that's not got much spam in it.
Sun's sparc strategy has been centered around the
idea of multiple cores and chip-level multi-threading for a while (see
this article for one of latest announcements).
I guess this also validates
Sun's approach with Sparc. Not that it's all that
unique -- I guess all chip makers have similar
goals -- but sometimes it's seems there's bit
of bias here, whereas AMD rocks and everyone else sucks.
--
I like paying taxes. With them I buy civilization -- Oliver Wendell Holmes
I think the transmeta has a lot of potential in many ways. Being able (in software) to morph the instruction stream should make it possible to build a "native" (or as native as transmeta ever is) JVM or other virtual machine. (Has this been done yet? If not, is there a good reason?)
Even better, with a fast interchip connection network, building a cluster of these things could be very nice indeed. (There was a comment about a transmeta cluster a day or two ago that was quite interesting.)
Even better and better, its not hard to imagine a portable machine running with a long lived battery, low power disks and multiple transmeta processors that turn on and join in when needed.
What about clockless CPUs? Async Chips? There are lots of good ideas that could have a future. Even the ARM. I wounder how fast you could push an ARM chip in a desktop or even a notebook machine if you through the time and money at it that Intel and AMD have put into x86
-- See my blog http://ilovecookes.blogspot.com/ for light hearted technical information.
Anyone get the impression that the manufacturers are hitting the limit on how much they can cram into a single core?
Not at all. : )
You can *always* find something more to stuff in a core. If nothing else, increase cache size, or add more pipelines.
However, as you increase the number of transistors, the size of the die goes up - production drops, yield percentages drop, and it starts getting very costly.
But, every couple of years, a new manufacturing process finds it's way into production usage, which allows manufacturers to make smaller transistors, and then they pack more on a chip.
The adding of a second core is practically insignificant in difficulty compared to designing a completely new architecture. It's a way for AMD to easily, quickly, cheaply take advantage of smaller manufacturing processes to get lots more transistors working. In the mean time, they'll be working on a newer processer, I'm sure.
steve
-- Oh, you're not stuck, you're just unable to let go of the onion rings.
Re:AMD? 2005?!?! Who cares? G5 Available *NOW*!
by
ChaoticLimbs
·
· Score: 1
Good thing you posted that anonymously, appleboy.
Re:Hey Geeks, stop making bad dog jokes for a sec.
by
Anonymous Coward
·
· Score: 0
Well, the difference is that the 2 processors aren't always fighting.;)
Re:I know this has been said countless times, but.
by
keith.bronstrup.com
·
· Score: 0
I don't do any 3D rendering, but I believe I do more processor-heavy work than the average Carlos - sp. big numerical differential equation and bigbigbig linear optimization stuff in Maple - and my tienda-de-descuentos K6-II still crunches the stuff faster than I could ever desire.
then I guess I'd say this... "You don't need more processing power!"
-- Error 666 - SCO source has been found in your Linux kernel. Please remove it. Formerly kdsolutions
> SMT allows one thread to do a bit of processing for a while, until it runs out of data. It requests data from memory and then goes off to lala-land for a little while while the other thread takes over.
I believe that's a bit off. Multiple threads will excute simultaneously, not take turns (hence, the 'S' in SMT). The point of SMT is to keep your pipe stages full, and the reasoning is that a single thread won't have enough instruction level parallelism to do that at all times. If I remember correctly, the now-defunct Alpha EV8 (21464) was supposed to be 4-way SMT. The Pentium 4 (aka HyperThreading) is 2-way. To execute two separate threads concurrently, you'll have to have two program counters.
The one thing to note about the P4's HyperThreading is that (AFAIK) the OS sees two logical processors, not one SMT processor. The significance of that is that you could actually have two separate processes run simultaneously on the CPU (as opposed to two threads of a process). My theory on why some benchmarks perform worse with HyperThreading enabled is because multiple processes will cause TLB thrashing. This is why you're more likely to get better performance from a dual core CPU.
Unfortunately, I haven't done too much reading into SMT. If you want more info, you can go here.
> Memory bandwidth has gone up by a factor of about 64, but latency has only decreased by a factor of about 10 or less.
DRAM vendors have been focusing on capacity and manufacturing costs over speed. DRAM is a commodity part, driven more by yields and manufacturing than design (not saying that design isn't important). One reason latency hasn't improved is because every bit on a DRAM cell is stored in a capacitor. Not only do capacitors leak (so you have to refresh every so often), but capacitance itself means that voltage swings will be slow. The speed gap between DRAMs and processors will get worse unless industry moves to a different storage mechanism.
Get it? Actually the K9 is a tooth, but people call dogs K9s . ..
forget it.
Re:AMD? 2005?!?! Who cares? G5 Available *NOW*!
by
Anonymous Coward
·
· Score: 0
Worst. Troll attempt. Ever.
Go back to posting tubgirl ascii art. Even THAT was [relatively] funnier.
Re:I know this has been said countless times, but.
by
anethema
·
· Score: 1
The problem with the hype makers promoting 'newer faster ram' is that the memory bus is clocked and data is let in at a very set rate. So you can improve the ram all you want, but unless you clock that memory bus up and make the processor capable taking in the data any faster, faster ram isn't going to help one bit. You could improve the latency and that would certainly help, but not a whole lot since that's not the main performance bottleneck. Right now what we really need are much faster memory pipes and getting rid of the shitty antiquitated spinning disc hard drives. Terrible.
Everyone talks about mram being great for replacing main memory for faster boot up times, etc. But seriously, who really cares about boot up times, most of the people I know just leave their computers on most of the time. Main storage on the other hand, really needs replacing. Its generally unreliable, its VERY slow (the only thing besides cd-roms who's access time is measured in milliseconds,) and isn't exactly cool (newer hard drives sometimes have regular running temperatures of 50c or more..this is enough for you to feel pain when you touch them)
If anything needs replacing its main storage, not main memory. If you want to increase memory speeds, work on the bus and cpu, not the memory it self. There is already DDR2 and stuff out for that.
--
It's easier to fight for one's principles than to live up to them.
Since opteron has multicore designed in from the start, this should just be a matter of flipping the switch to dual-core and recompiling. Optimization to follow of course. Now they'll also need to shrink below the current 0.13 micron for this. My qustion then would be: Will this be a 0.09u processor - in which case it suggests they're behind on their published process roadmap. Or is it a 0.65u part with a very agressive process timeline? Honest, look at the old docs - dual core is in there. One bigshot even said dual core was working in simulation a few months ago. It a process issue now.
Re:I know this has been said countless times, but.
by
Knights+who+say+'INT
·
· Score: 1
then I guess I'd say this... "You don't need more processing power!"
Yes, on a second thought, my post was short-sighted in assuming computer use is mostly desktop stuff. It's funny how Slashdot moderation ends up working, it's always my worst posts that get modded up, while my smartest stuff always gets modded to score 0. Really, just check out my recent history.
Everyone talks about mram being great for replacing main memory for faster boot up times, etc. But seriously, who really cares about boot up times, most of the people I know just leave their computers on most of the time
Um, desktop users - specially those at home - tend to turn their computer on and off all the time, and not just for Windows making you reboot everytime you move the mouse. That's one of my pet peeves about Linux - it actually takes longer just to give me a text-mode login prompt than Win98 on the same box takes to boot up, come up with ICQ Lite and Firebird on three different tabs (Slashdot, User Friendly and Diesel Sweeties). It just gets worse with the desktop-oriented installs that login on graphical mode and send you to KDE.
Someone should come up with XP-like "hybernate" on Linux. When I shut down to "hybernate", it'll dump my ram to permanent storage, and next time I turn the computer on I'll be exactly where I was - open programs, unsaved files, even the position of the mouse pointer.
Re:I know this has been said countless times, but.
by
MoThugz
·
· Score: 1
If AMD is 100% owned by you and only produces processors for you, then I too would like to know why! But that's not the case now is it? In the real world, if you can come up with the goods, then we sure as hell would find ways to use it to its full potential.
Re:AMD? 2005?!?! Who cares? G5 Available *NOW*!
by
Rallion
·
· Score: 1
Trolloid!
Re:I know this has been said countless times, but.
by
anethema
·
· Score: 1
I dont know about the desktop thing, off and on all the time. Computers booting up it still a tiny percentage of how long computers are on. I'm on a 1ghz athlon right now, with 512mb of ram, and my computer boots up in like 15 seconds (WinXP, not including post).
Linux bootup time can be greatly optimized. With some clever hackin at the startup scripts you can cut it down a LOT. I think there might have even been a slashdot story about it. There is a lot of shit that starts up that you dont need and will never use. Recompile the kernel too and get rid of modules you dont need. For the mp3 player in my car, celly 633 laptop with 192mb of ram..i got it to boot in 7 seconds not including post. 10 seconds including X and xmms starting up.
Either way, bootup times are really a secondary consideration when it comes to improving the computer. AND, if you replaced main storage, you could restore hibernation from it VERY quickly.
--
It's easier to fight for one's principles than to live up to them.
multimedia could drive multiple cores
by
chipace
·
· Score: 1
I like your approach for innovating, rather than slapping parallelism together. However, I think that the multicore cpu is seen as a low risk path to higher performace in a certain tasks.
Multimedia is seen as the application that will drive mainstream consumers to spending more money for processing power. This includes games, video editing and processing... applications that could allow dual cores to run at peak efficiency when they are needed.
My computing runs simulations that depend on past data, it has to be a single threaded. I couldn't benefit from dual cores or SMP... but I think that multimedia companies will make special ports to take advantage of this (especially with the dual G5 systems).
Innovation follows profits... or perceived profits.
You don't define the "max" needed. You define the "min." Special effects studios, researchers, scientists, THEY and many others define the "max" needed and it's never enough. We can always find reasons to need to process more data faster.
If all you need is a word processor then great. But you can't simulate complex weather paterns on a K6-II in anyone's lifetime.
"and my tienda-de-descuentos K6-II still crunches the stuff faster than I could ever desire."
I have a friend who upgraded his system to top of the line and loves it because simulations that used to take days now take hours which means he can do better and more research.
"And prolly there's not too much activity in technologically improving RAM either."
Apparently you missed it when DDR came out and the Dual DDR found on graphics cards that will probably make it's way into PCs eventually to replace the current DDR. And who knows, an even faster memory may be developed before then skipping that stage.
You may be content with old tech but many people could use a speed boost to get their work done faster.
They're barking mad, those AMD engineers. They should paws and consider how this will whippet the Intel engineers into shape.
Re:I know this has been said countless times, but.
by
dr.Flake
·
· Score: 1
"Someone should come up with XP-like "hybernate" on Linux. "
ALready exists. Saves the whole shebang in swap, when you boot, it finds it reads it directly into RAM.
patience, it will get mainstream quickly, because the need, as you described, is indeed present.
The previous poster mentioned the Banner been written to disk when surfing. That is actually a browser thing. (saving it for next week when you check in on the site again, not having to download it over 54k again.)
But it made me think;
Is there a viable option to plece between RAM and HD. As the difference between the two is likely to persist for quite a while. I wouldn't mind some solid storage (say 5 gig) as a provider for frequently required data (boot!, office apps, the data your working on at the moment AND your linux/WinXP hybernate file). Should be something of the same size of a traditional HDD, preferably on the same bus (S-ATA??), should not mind thousands of rewrites (sorry for current flashmem) and CHEAP. (same price as a current HDD).
Would be my christmas present (one of them, i'm spoiled)
-- Why are other peoples sig's always more witty ???
K9 - Best of Breed?
by
Anonymous Coward
·
· Score: 0
Heh, what kind of a canine we talking about here? Doberman? PitBull? Akita? English Bulldog?
Re: GPL and GCC
by
Anonymous Coward
·
· Score: 0
In some cases free (as in speech and beer) is better than optimal. In this case, free has a higher priority than optimal; optimal can still be had, but for a price. In the case of development of other "free compilers," that cost is time. I'd like to add that GCC has been forked before. The last divergent fork (egcs) evolved into the dominant branch. Nothing prevents people from basing their work on the GCC branch or starting from scratch. Most developers won't invest in a project taking the latter strategy simply because it's unnecessary and will take too long. Which isn't to say that it ought not be done, just that it's not the most efficient solution path.
Re:I know this has been said countless times, but.
by
cjb110
·
· Score: 1
Don't buy it then, no ones forcing you to.
Oh and as for faster memory, Dual Channel DDR and DDR-II are here (or nearly here), both of which improve memory speeds.
-- -----
I refuse to have an argument with an unarmed person
Power 5 - Is this Science or Art?!!
by
purrpurrpussy
·
· Score: 1
Most comments on this thread will be from people who have no sense what so ever on how MPP SMP or any other processing methood works in real life. So don't listen to them. And for the same the IA64 uses out of order execution wich is good and bad. We don't know wich but it's diffrent. Both are a fairly young technologies and have not been utilized to it's fullest extend. But in this I think change is good. But some old farts will always have some silly DOS pograms running software that no one has been able to replace and such will always be the case. Why should I change a program which performs perfectly for that speciffic task and write a new buggier version wich has a gui interface and with alot of cost.
Regards Kerling ps. PL1 COBOL FORTRAN and all that shit ain't dead
Re:You want to see multiple cores? Check this out
by
pmz
·
· Score: 1
You know, just *thinking* of the cooling that kind of thing would need makes me shudder.
Re:Do we want to? - UltimaVII
by
Rui+del-Negro
·
· Score: 1
I already have it. It was just an example. I want them to play Privateer and Goal! and Syndicate and a lot of other great DOS games too.
People today can see the very first movies ever made on their computer (or their TV), but it takes a lot of work to get an old game to work on a modern computer / OS. It's a bit silly that I can run hundreds of ZX Spectrum games on my system (inside an emulator) but 9 out of 10 DOS games won't work properly unless I boot into DOS (yes, I know about VDMSound, too, but it has its limits). If the hardware changes to the point that DOS won't run, even that is lost.
I guess we can always keep an old Pentium or 486 around for the oldies, but to me that's a bit like having to have a B&W TV (or a film projector) to watch old movies.
Re:I know this has been said countless times, but.
by
evilviper
·
· Score: 1
The main problem with personal computers is that they use hard drivers for memory swap space when they should be using RAM memory to cache for hard drives.
Actually, they do both... And quite well.
A dual-method approach really is best, since programs which haven't been used recently can be written to disk, which then frees up more memory for caching hard disk files.
If I could spend $500 on my computer right now I'd fill it with as much memory as the architecture allows. I'd then run a ramdrive and direct many of the computer activities to there.
First of all, memory is rather expensive, so getting 320GBs of it really isn't feasable, although getting a 320GB HDD is...
Secondly, you don't need a RAM disk, as any decent OS will cache everything into available memory, so if you have room for that mozilla executable in memory, it will be put there. This has the added advantage of just dropping thoses cached files from memory, when/if you launch a program that needs that extra memory. If you had a ramdisk, that data would HAVE TO stay in physical memory, starving your memory-hungry app for RAM.
I mean, when a webpage opens, a banner is downloaded to my hard drive. That's just irrational.
Not only is it irrational, it's completely false. All you have to do is change a little setting, and nothing will be cached to your hard drive. I've done this on every computer I've ever setup, for the past several years.
But then again, we don't have a benchmark of ram speed, nor do we have hypemakers touting new, faster RAM. And prolly there's not too much activity in technologically improving RAM either.
Slashdot Mirror
sure the klingons arnt going to get pissed they are using the name of one of their warships
"Slashdot, where telling the truth is overrated but lying is insightful."
It's about time.
Standing on the shoulders of giants.
...Since someone is bound to say the K9 will be a real dog.
That the K9 is gonna' be a dog....
Isn't theory a great place? Everything works in theory.
This processor sounds like a real dog.
Hopefully this processor will give AMD some more "teeth" ;)
John Carmack fan, browsing at +5 since 1999.
sounds like a real dog to me... thank you. i'll be here all week. please, tip your server. *bows*
Chips based on the K9 architecture will likely be released--at least in sample quantities--by the second half of 2005, Weber said. AMD engineer Randy Allen is overseeing the project.
Note to marketing department: New "K9" chip promises to be "a real dog".
Ruby on Rails Screencast
Ya but we don't know crap about what it is supposed to be able to do so I am not that enthused
INTEL - are you there ? Please go buy off this pesky little companies. Or at least try to claim that they stole your patented code and sue the hell out of them. This is called business vision now a days ...
Meanwhile china is sending people out in space and india is building ICBMs ....
- People who believe other people have no right to live, got no right to live ...
I am glad to see chipmakers getting off their asses and making progress finally.
I guess they are ramping up due to the fact that the lack of corporate spending on tech is going to have to have a turnaround shortly saying that all the computers people bought a few years ago now need to be replaced. However comes out ahead here is bound to make a lot money.
anime+manga together at last.. in real time.
Dr. Who? AMD needs to bring in Tom Baker to be their spokesperson.
Yes, but will the AMD chip have:
Treads
A nose-mounted Staser
Access to the Timelord Matrix?
www.eFax.com are spammers
"The K9 is currently slated for the second half of 2005, which would be less than 3 years after the Opteron shipped."
Ah! Obsolescense, thy name is "Charge Card".
Why would you care about this when you can have a G5 Mac today? The fastest desktop computer on earth, with the most advanced OS out there, why wait for crap from a second rate pee cee cpu manufacturer? Ugh, you'd even have to run Linux or Windows on it. Wake me up when those either of them match the functionality, useability, or performance of OS X.
The K9 is going to be a real dog.
... oh nevermind. Several beat me to the punch already.
Trolls lurk everywhere. Mod them down.
It appears that this chip based on the x86 architecture. Why would AMD still focus on the x86? By 2005, the Opteron should of made a big enough dent in the market so *hopefully* by then most everyday software would be 64bit. I wish the industry would shift away from x86 and move on the 64bit processors, which we all know is the future of computers.
I don't like to see that K in there in the AMD chip name. It reminds me of my old, underperforming processor, and makes me sad.
Slashdot Syndrome: the sudden, extreme urge to correct someone in order to validate one's self.
So, now we'll have multiple processing units and pipelines in each core, and multiple cores. The biggest question in my head is how much limitation there will be from memory bandwidth limitations. I just don't see how you can supply data and instructions fast enough to, say, three 3 GHz cores running on the same chip unless you have close to a thousand pins on the chip. The other question would be about cooling. :)
hrm. then again. maybe not.
"I guess they are ramping up due to the fact that the lack of corporate spending on tech is going to have to have a turnaround shortly saying that all the computers people bought a few years ago now need to be replaced" .... not if they're running Linux.
If this ever has a chance of being successful, it has to win the price war. Corporations are so hesitent to look at AMD, especially for servers, the only way they will win is through that great cost/benefit analysis bull.
Was that night on the marge of Lake LaBarge I cremated Sam McGee...
Let's see... AMD missed the original launch date of their Barton core CPU's by at least 3 months, missed the launch date of the Opteron by over 6 months, and the original launch date of the Athlon 64 by almost a year.
:)
If they're saying now that the chip will be 4Q 2005, when should we REALLY be expecting it to show up on store shelves? 3Q 2006? 1Q 2007, maybe?
Yeah, sure the fastest ...
http://www.pcworld.com/news/article/0,aid,112749,p g,1,00.asp
As the manufacturing process shrinks, and companies are able to put more transisters on a chip, the question arises: What should we use those extra transistors for?
Now, there are several options. They could come up with a new processer design, but that takes a tremendous amount of R&D. They could just put tons of cache on the chip, but that gives diminishing returns.
Or.... the Opterons already have very simply I/O mechanisms, namely, HyperTransport. Literally all they have to do is plop down two Opteron cores, connect the HyperTransport lines, and bam: Dual-core processer. I'm honestly surprised they're not doing it SOONER.
Of course, the lines for memory controllers and the like have to be drawn out to the pins on the packaging, but that's a piece of cake.
steve
Oh, you're not stuck, you're just unable to let go of the onion rings.
Everyone knows that mountain jokes would be more funnier.
The surprise isn't how often we make bad choices; the surprise is how seldom they defeat us.
Sounds like a real dog! :>>>
"The biggest question in my head is how much limitation there will be from memory bandwidth limitations."
:)"
Maybe MRAM will be in production.
"The other question would be about cooling.
Build your computer into the hot water heater.
I need to study up on CPU architecture. Multi-core CPU's sound awesome, but I'm not sure what it means performance and price-wise. Anyone know of any good resources on processor architecture?
As I understand it, part of the point of Source-Level cores (eg. like OpenCores.org) is to be able to synthesize multiple cores into a single chip and have them talk amongst themselves via standard internal interfaces. Eg. a chip contains a microprocessor, an implicit USB interface, and maybe has some hardware-accelerated DES encryption included as well. And OpenCores brings this capability to the common person.
sounds great, guess I'll have to buy that liquid cooled case after all
Nice Troll
Yes, x86 is winning for traditional personal computers, but RISC is being used for a lot of smaller devices. Can you say Palm? Also, last time I checked, IBM was still selling RS/6000 series machines with RISC-based CPUs.
Sorry, my karma just ran over your dogma.
"We've hit the memory wall," Weber said.
Still, the problems are not insurmountable. Moore's Law, which states that the number of transistors on a given chip can be doubled every two years, has a lot of life left in it, Weber said. Designers will likely continue to increase the number of transistors on a chip by stacking them.
LOL, this style of writing (the kind without any explanation whatsoever) is dangerously close to Scotty-speak. :) Gotta reroute power from the secondary warp plasma phase inducers because the relays are fused! We're gonna increase the number of transistors on a chip by stacking them!
hrm. then again. maybe not.
The introduction of multiple "warp" cores introduces a cross-space-platform technology for increased Trek throughput. Instantaneous natural language conversion, for instructions, will be done through a derivative of Babelfish, using the Redneck filter.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
Cerebron...
I'm talking about the original dog from Hell!
If it flops we can call it "Poochie"
Folks we really do not need to run DOS applications any more. If we do couldn't we emulate them. I just do not believe that the IAx86 is the best IA for the future. The idea that in 30 years we will be runing some mutant 128 bit X86 chip makes my skin crawl. I guess I miss the days when new ideas where the norm for microcomputers. Rember when there was the 32032, 68020, TM990, Zilog z8000, the 6502 family, and the 88000? . How about it Transmeta? Let's see a version of Linux that does not run on top of the the translation layer. Lets get some new ideas out there I am betting bored.
Now that I said that, GO AMD. While it is still X86 this is one of the more interesting ideas I have seen for a while.
See my blog http://ilovecookes.blogspot.com/ for light hearted technical information.
Don't ya think?
Now I know why I stopped reading ZDNet rags so long ago. They're truely trash.
'multiple chip cores--the "brain" of the chip'
I thought the chip was the brain of the computer? So the brain has a brain?
Sigh...
A deep unwavering belief is a sure sign you're missing something...
He meant the fastest at emptying your wallet
my karma will be here long after I'm gone
For those of you who live mainly in the software world (myself included) there's a very good overview of all things CPU on Arstechnica. Detailed enough to be interesting but starts at a basic enough level.
And remember than nothing impresses the ladies more than sombody who knows why multiple cores might be interesting
The biggest feature [of AMD's K9] will be that it contains multiple cores.
And if K9 technology ever trickles down to home users, how are they going to afford Microsoft's asking price for licenses of multiprocessor compatible versions of the Windows OS? Or will AMD contribute to Wine to get legacy (i.e. Win32) apps to run on an affordable operating system?
Will I retire or break 10K?
Seeing The Core once was enough for me. There was a reason it was such a dog at the box office.
Rank Presidents by th
"We've hit the memory wall," Weber said
I have meet a lot of people that I work with that are under the impression that their computer is running slow because the processor is slow and when I look at the system information they only have 128MB of RAM.
Basically, I think that the way to go is not necessarily faster, but better designed systems all together.
Having taken a system architecture and currently taking a compiler course, I found out that the x86's low number of register is such a drag. When will this end??? People bitched at MS for building Windows on DOS, maybe we should bitch at chip companies for building new chips on old architecture?
EvilCON - Made Famous by
I've noticed a few people respond already that multicore processors should've have been around sooner and what not but I think the timing isn't all that bad. Consider the amount of extra heat that multicore processors may generate. Water cooling products are one the rise and I'm betting that they'll be common place (or at least on the verge of being the norm) by 2005, if not sooner. That could work out well for AMD's new chips, especially remembering some of the heat problems they've faced in the past. That said I think multicore AND watercooling should have been around way before they are.
Folks we really do not need to run DOS applications any more. If we do couldn't we emulate them.
Such emulation is feasible, as shown by DOSBox and Bochs. Have you donated yet?
The idea that in 30 years we will be runing some mutant 128 bit X86 chip makes my skin crawl.
Having a small instruction coding saves on instruction memory bandwidth. An x86 (Intel) or Thumb (ARM) instruction may weigh in at about 16 bits, while an Itanic instruction is a massive 128/3 bits.
Will I retire or break 10K?
but I want it nooooow!
:/
I want an opteron right now as well
thing is, isnt intel planning to release a 7 ghz cpu in that time frame as well?
they better have a good plan for that.
I mean, c'mon just d/l the MegaCore.PDF image of the cpu you want to print, and pow...out it comes from the Canon CorePrint(tm) Silicon Bubblejet.
Gimme a break. STILL BUYING processors in 3 years!?!? No way! Ha!
That little quote at the end of the article has me worried.
" Designers will likely continue to increase the number of transistors on a chip by stacking them."
What is the density of transistors going to do for the problem of generating too much heat when they are getting layered in the third dimension? Can I begin to expect the need for a cooling tower outside my apartment to handle the job of heat exchange?
Fnord.sig
and explain to me WTF this means. What is an extra "core" in a CPU chip?
K9 huh? Do we need a ziplock baggy when it takes a core dump?
Furthermore, Hypertransport is *not* simple. As a point-to-point interconnect, maintaining cache coherency is not so easy ... But I think they have figured this out already.
The Raven
People building for that target would naturally use the mode that produces the faster code. Of course the OS would be compiled that way, too. Only code for which speed doesn't matter (i.e. most commercial programs) would still be built to the old target.
The new instruction set could not be designed entirely de novo, because it would retain some details needed to get access to peculiarities of the x86 machine. However, it could be very much cleaner, and easier to generate and optimize, than regular x86.
In all likelyhood, the K9 will be based on AMD's x86-64 instruction set, the same as the Opteron and Athlon 64/FX. x86-64, as far as I know, looks pretty much like a regular CISC x86 cpu at the assembly level, just with intruction and data blocks that are twice the size (it's even natively binary-compatible with regular 32-bit x86 code).
::shudder:: XP (and before someone says it, Windows 9X wasn't a fully 32-bit OS. It was enough to break compatibility with 16-bit processors, sure, but a lot of the system was still implemented in old-school 286-style assembly). Nowadays, Linux already has mature ports on a bunch of 64-bit platforms, including the two x86-ish ones: ia64 and x86-64. Windows users can have fun waiting for 64-bit XP to crash their systems up to 4 TIMES FASTER. Hooray!
A good comparison here is Sun's SPARC line of RISC processors. The original SPARC chips were 32-bit, then Sun introduced the UltraSPARC, a 64-bit version of the same architecture that retained binary compatibility, but could be programmed in 64 bits as well.
Hell, those of us who are old enough remember when x86 was only a 16-bit architecture (80286, anyone?). The 386 was the chip that made the transition, and it, like the K8, was fully backwards compatible and programmed very much like its predecessor. Incidentally, Linux was a fully 32-bit OS in 1991, and Windows only got there with NT, and not on the desktop until
Anonymous Luddite: "What do you think of the dehumanizing effects of the Internet?"
Andy Grove: "Not Much."
8-way multi-core cpu
Versions of PowerPC comes with 2 and 4 cores. Playstation3 is already being designed with cell processors. Seems like we'll hit the clockcycle limit, already have hit the bits limit to 64-bits (128 bits will never be practical) and shrunk the die to have each wire 5 atoms wide. The next logical step is to increase the number of cores, maybe incorporate the memory itself (maybe 128MBs of it) at full core speed on the same die, maybe incorporate the GPU on the same die and start going vertical.
I think for now moore's law will be bent and we'll see the slowing down of processor development, until they bring in quantum computing when the processor performance will spike up and correct the moore's law line.
"Give orange me give eat orange me eat orange give me eat orange give me you." -Nim Chimpsky
Seigfreid and Roy are running scared!
As a famous nerdy guy (no, not Bill, the other one, starts with an L) once said, what some people see as x86's weaknesses are actually some of its great strengths, and if you design a very elegant architecture and then start optimising it for the real world, you might be surprised to end up with something that looks a lot like x86.
;-).
AMD-64 (x86-64) addresses some of the main problems of x86 (namely the small number of registers). Since virtually no-one codes in assembly anymore, and as long as the compilers are able to produce fast code, who cares if the architecture / instruction set is "elegant" or not? IA64 is "new" and "elegant" and most people I know who work with it say it's hell to work with. Compilers can't optimise, coding by hand takes forever, etc..
AMD-64 (x86 with 16 64-bit GP registers and 16 128-bit SSE registers) sounds like a good thing to me. Backwards compatibility also sounds like a good thing to me (I want my kids to see Ultima VII
Kerberos
How small a thought it takes to fill a whole life
How on earth are they gonna fit him inside of my mini tower computer?
Ave Molech Setting
Ah, that's nothing compared to the Itanium.
1998-->2001 if I remember correctly
1998-->2001 if I remember correctly
And that first one hardly counts.
By having multiple register sets within a single core, and tagging requests/results, you can avoid the complexity of SMP entirely, while producing the effect of having multiple processors.
If you want to go further, improve the support for internal routing of operations. Thus, if you've instructions operating on the same data, the data can be directly sent from logic element to logic element. The entire chain could then be executed as a single instruction (albeit composite). This also eliminates the need to have a CISC-to-RISC layer in the processor, as complex instructions would be mapped by routing commands and not by multiple internal fetch/execute cycles.
By adding input/output FIFO queues to each instruction, where each node in the queue tagged the "virtual" processor associated with that instruction, the CPU would be limited in the number of CPUs it would look like only by the number of bits used in the tag. (eg: An 8-bit tag gives you 256 virtual CPUs on a single die.)
Why is this better than "true" SMP? Because 2 CPUs can't run a single thread faster than 1 CPU. Programs are generally written with single processor systems in mind, and therefore cannot run any better when the extra resources exist.
Sub-instruction parallelism allows you to run as fast as you can fetch the instructions. Because the parallelism is merely at the bookkeeping level, there's no overhead for extra threads.
Because the logic elements would pull off the queues, as and when they were free to do so, there's no task-switching latency.
Because the parallelism is sub-instruction, and not at the instruction block or thread level, more of the resources get used more of the time, thus increasing CPU utilization. It also means that tasks that aren't parallel at a coarse-grain can likely get some benefit, as there may well be parallelizations that can be done at the element level.
Because a single, larger die can carry with it more useful silicon than two or more seperate dies. (Which is likely why AMD are using multiple cores in their K9 CPU.)
AMD's approach is an improvement over the seperate CPU schema, but it's nowhere near the potential an element-cluster could provide. The parallism that can be gained is way too coarse-grain. It'll offer about the same level of improvement the move from seperate 386 and 387 chips to the 486DX did, for much the same reason. Reduced distances and reduced voltages allowed for faster clock rates on the same technology.
But engineering at the right level will always produce better results than cut-and-paste construction, even if it does require more thought.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
that wascally wabbit thwarts that martian and his K9 every time
just... no.
Fuck Beta. Fuck Dice
Is it true that the AMD K9 will be man's best friend?
Might as well start the lame jokes now, I'm guessing the engineers at AMD saw that coming long ago, too.
Do you have ESP?
Do you hear anyone referring to AMD64 as "K8"? I hear AMD64, x86_64, Opteron, Athlon64, but never K8 (maybe once or twice, to relate how similar the FX, Athlon64 and Opteron are)
So we'll call it K9 in the same way we call PentiumPro/II/III all i686. And no one will get the dog jokes, except us, and maybe 4 readers and 1 of the creators of Penny Arcade.
How sad.
Fuck Beta. Fuck Dice
What is the *real* advantage of multi-core CPU compared to traditionnal SMP systems?
Don't they generate a lot more heat on a more compact surface for almost the same performance ?
Huge powerpc with multiple core
Short form: 2 CPU's in one package. In this case on one chip.
Forget diamonds, copyright is forever.
....the breakthrough development of cold fusion power supplies in an BTX form factor.
And a liquid nitrogen cooled case.
Everyone has now given into the fact that you need more complexity to get higher performance per clock.
Evidence of this: The multiple-logical-core (see Aurora, Intel HT, EPIC, Power5) trend is the next step in complexity beyond pipelining and predictive execution/caching.
Fuck Beta. Fuck Dice
2 CPU's in one package. In this case on one chip.
What is the difference then from just having a duel processor system?
I bought two computers for the price of your one computer, and I can invite a friend to play Unreal Tournament with me.
Ahhh, yes, LAN party.
What were you talking about?
Fuck Beta. Fuck Dice
The benefit here is that AMD can focus on performance-boosting only those instructions that the GNU compilers will use. The new K9 only needs to be able to execute the remainder of the instruction set, regardless of speed.
AMD has a tough task. The K9 must execute the legacy x86 instructions, the MMX instructions, the SSE/SSE2 instructions, the 3DNOW! instructions, and the x86-64 instructions. This will be a debugging nightmare.
A big bulldog with AMD painted on it's side marches up to a pile of P4's and urinates on them.
-- Having a Creationist Museum is like having an Atheist place of worship
Get Exult. It is an open source, reverse-engineered implementation of the Ultima7 game engine. I've been using it for a couple of years now. Makes it even better than the original version!
http://exult.sourceforge.net/
AP Newswire, Aug 14, 2007: In a paper published in the journal Science, MIT researchers announced the achievement of a sustained nuclear fusion reaction. This stunning accomplishment was, oddly enough, purely accidental, triggered by the failure of the cooling system on MIT's new AMD-K9-based 256-node Beowulf cluster, which had gone into full operation only a week prior to the event.....
Life is like surrealism: if you have to have it explained to you, you can't afford it.
The funny thing about reading sorted by "highest scores first" is that this kind of post appears right near the end (!)
sit ubu, sit .. good proc!!
.. this might be the worst of them all ;D
Oh my god
ehehe
I fuse with Mercer every single day...
Why do I need -more- processing power?
I don't do any 3D rendering, but I believe I do more processor-heavy work than the average Carlos - sp. big numerical differential equation and bigbigbig linear optimization stuff in Maple - and my tienda-de-descuentos K6-II still crunches the stuff faster than I could ever desire.
The main problem with personal computers is that they use hard drivers for memory swap space when they should be using RAM memory to cache for hard drives.
If I could spend $500 on my computer right now I'd fill it with as much memory as the architecture allows. I'd then run a ramdrive and direct many of the computer activities to there.
I mean, when a webpage opens, a banner is downloaded to my hard drive. That's just irrational. And it prolly wears the hard drive's physical mechanism faster too.
But then again, we don't have a benchmark of ram speed, nor do we have hypemakers touting new, faster RAM. And prolly there's not too much activity in technologically improving RAM either.
With multiple cores, This thing should be able to process as fast as a pack of scalded ass dogs! ;)
...the register have news about sun's new upcoming processor, UltraSparc IV.
Looks like mutli-core processor is trend of the future.
WTF?!?!?!?! WHOA!!! Why isn't THIS making any news?
after k7 went through the horse series (palomino, thoroughbred, applebred) i hope the k9 series goes fido, rover, collie, etc.
this sig intentionally left blank
If i get one of these, will it make my Aibo jealous?
This is usually how the story goes: .....
1. AMD announces new processor to rock all intel processors.
2. Intel waits about a year, then unleashes a huge add campaign (aka centrino) about a previously unannounced project.
3. AMD is once again on the backburner
4. Skip the
5. Profit for Intel.
When will AMD make available Stacking CPUs for N way systems. Intel first again?
Obligatory Silicon Zoo reference
The Web is like Usenet, but
the elephants are untrained.
Wow, wow!
Stated the same thing the otherday
With the pentium pro, K6, etc.
No operation is directly executed anymore, it's all interpreted.
Fuck Beta. Fuck Dice
The first thing that popped in my mind: K-9
AFAIK, the translation layer of Transmeta CPUs is a good thing, as it can optimize the code on the fly. There is a cache for translated code, so this will mostly benefit repeating stuff like scientific computing.
However, I completely agree with your point of discarding x86. Switching to a different CPU seems like the least hardware issue, at least with Linux and BSDs. Unfortunately things are different for the masses that use closed source. Besides, my next computer will probably be an x86 anyway as I can't afford anything technically superior.
Escher was the first MC and Giger invented the HR department.
But do you have to have a license for them?
I suppose big is a relative term, but if your K6-II solves differential equations faster than you desire then your system can't be *that* big. I've run semiconductor process simulations that took 2 hours on a SunBlade 2000...
Also, I must defend the memory manufacturers: there is a tremendous amount of R&D that goes into RAM every year. The focus is just on density rather than speed.
It renders movies, it roasts meat, it's an all-in-one appliance.
FORGET all those other processors.
LOOK at this P4, it gets barely warm enough to melt the cheese on this burger [insert picture]. Now look at the K9: not only are you grilling that cheeseburger, but with that Texas-sized heat sink and those multiple cores, there's enough room and heat to grill 4 ears of corn.
Order your K9 today while supplies last. Operators are standing by.
Well, there's spam egg sausage and spam, that's not got much spam in it.
Sun's sparc strategy has been centered around the idea of multiple cores and chip-level multi-threading for a while (see this article for one of latest announcements). I guess this also validates Sun's approach with Sparc. Not that it's all that unique -- I guess all chip makers have similar goals -- but sometimes it's seems there's bit of bias here, whereas AMD rocks and everyone else sucks.
I like paying taxes. With them I buy civilization -- Oliver Wendell Holmes
Didn't you read the article? RISC is only good for cell phones now a days.
- It's not the Macs I hate. It's Digg users. -
"Only in their dreams can men truly be free 'twas always thus, and always thus will be."
--Tom Schulman
Great, on AMD's current form maybe we can expect this product by 2007!
You know, just *thinking* of the cooling that kind of thing would need makes me shudder.
01101001 01100001 01101101 01101110 01101111 01110100 01100001 01101100 01100001 01110111 01111001 01100101 01110010
Even better, with a fast interchip connection network, building a cluster of these things could be very nice indeed. (There was a comment about a transmeta cluster a day or two ago that was quite interesting.)
Even better and better, its not hard to imagine a portable machine running with a long lived battery, low power disks and multiple transmeta processors that turn on and join in when needed.
Anyone get the impression that the manufacturers are hitting the limit on how much they can cram into a single core?
The 10Ghz computer of the future, may just be 4-core CPUs running at 2.5Ghz.
"If anything can go wrong, it will." - Murphy
Good thing you posted that anonymously, appleboy.
Well, the difference is that the 2 processors aren't always fighting. ;)
I don't do any 3D rendering, but I believe I do more processor-heavy work than the average Carlos - sp. big numerical differential equation and bigbigbig linear optimization stuff in Maple - and my tienda-de-descuentos K6-II still crunches the stuff faster than I could ever desire.
then I guess I'd say this... "You don't need more processing power!"
Error 666 - SCO source has been found in your Linux kernel. Please remove it.
Formerly kdsolutions
> SMT allows one thread to do a bit of processing for a while, until it runs out of data. It requests data from memory and then goes off to lala-land for a little while while the other thread takes over.
I believe that's a bit off. Multiple threads will excute simultaneously, not take turns (hence, the 'S' in SMT). The point of SMT is to keep your pipe stages full, and the reasoning is that a single thread won't have enough instruction level parallelism to do that at all times. If I remember correctly, the now-defunct Alpha EV8 (21464) was supposed to be 4-way SMT. The Pentium 4 (aka HyperThreading) is 2-way. To execute two separate threads concurrently, you'll have to have two program counters.
The one thing to note about the P4's HyperThreading is that (AFAIK) the OS sees two logical processors, not one SMT processor. The significance of that is that you could actually have two separate processes run simultaneously on the CPU (as opposed to two threads of a process). My theory on why some benchmarks perform worse with HyperThreading enabled is because multiple processes will cause TLB thrashing. This is why you're more likely to get better performance from a dual core CPU.
Unfortunately, I haven't done too much reading into SMT. If you want more info, you can go here.
> Memory bandwidth has gone up by a factor of about 64, but latency has only decreased by a factor of about 10 or less.
DRAM vendors have been focusing on capacity and manufacturing costs over speed. DRAM is a commodity part, driven more by yields and manufacturing than design (not saying that design isn't important). One reason latency hasn't improved is because every bit on a DRAM cell is stored in a capacitor. Not only do capacitors leak (so you have to refresh every so often), but capacitance itself means that voltage swings will be slow. The speed gap between DRAMs and processors will get worse unless industry moves to a different storage mechanism.
The funniest joke in this whole damned thread and it isn't even a cliche and it gets modded a -1, I just love slashdot.
Get it? Actually the K9 is a tooth, but people call dogs K9s . . .
forget it.
Worst. Troll attempt. Ever.
Go back to posting tubgirl ascii art. Even THAT was [relatively] funnier.
The problem with the hype makers promoting 'newer faster ram' is that the memory bus is clocked and data is let in at a very set rate. So you can improve the ram all you want, but unless you clock that memory bus up and make the processor capable taking in the data any faster, faster ram isn't going to help one bit. You could improve the latency and that would certainly help, but not a whole lot since that's not the main performance bottleneck. Right now what we really need are much faster memory pipes and getting rid of the shitty antiquitated spinning disc hard drives. Terrible.
Everyone talks about mram being great for replacing main memory for faster boot up times, etc. But seriously, who really cares about boot up times, most of the people I know just leave their computers on most of the time. Main storage on the other hand, really needs replacing. Its generally unreliable, its VERY slow (the only thing besides cd-roms who's access time is measured in milliseconds,) and isn't exactly cool (newer hard drives sometimes have regular running temperatures of 50c or more..this is enough for you to feel pain when you touch them)
If anything needs replacing its main storage, not main memory. If you want to increase memory speeds, work on the bus and cpu, not the memory it self. There is already DDR2 and stuff out for that.
It's easier to fight for one's principles than to live up to them.
Since opteron has multicore designed in from the start, this should just be a matter of flipping the switch to dual-core and recompiling. Optimization to follow of course. Now they'll also need to shrink below the current 0.13 micron for this. My qustion then would be: Will this be a 0.09u processor - in which case it suggests they're behind on their published process roadmap. Or is it a 0.65u part with a very agressive process timeline? Honest, look at the old docs - dual core is in there. One bigshot even said dual core was working in simulation a few months ago. It a process issue now.
Yes, on a second thought, my post was short-sighted in assuming computer use is mostly desktop stuff. It's funny how Slashdot moderation ends up working, it's always my worst posts that get modded up, while my smartest stuff always gets modded to score 0. Really, just check out my recent history.
Um, desktop users - specially those at home - tend to turn their computer on and off all the time, and not just for Windows making you reboot everytime you move the mouse. That's one of my pet peeves about Linux - it actually takes longer just to give me a text-mode login prompt than Win98 on the same box takes to boot up, come up with ICQ Lite and Firebird on three different tabs (Slashdot, User Friendly and Diesel Sweeties). It just gets worse with the desktop-oriented installs that login on graphical mode and send you to KDE.Someone should come up with XP-like "hybernate" on Linux. When I shut down to "hybernate", it'll dump my ram to permanent storage, and next time I turn the computer on I'll be exactly where I was - open programs, unsaved files, even the position of the mouse pointer.
If AMD is 100% owned by you and only produces processors for you, then I too would like to know why! But that's not the case now is it? In the real world, if you can come up with the goods, then we sure as hell would find ways to use it to its full potential.
Welley Corporation - SLM Scammers
Trolloid!
I dont know about the desktop thing, off and on all the time. Computers booting up it still a tiny percentage of how long computers are on. I'm on a 1ghz athlon right now, with 512mb of ram, and my computer boots up in like 15 seconds (WinXP, not including post).
Linux bootup time can be greatly optimized. With some clever hackin at the startup scripts you can cut it down a LOT. I think there might have even been a slashdot story about it. There is a lot of shit that starts up that you dont need and will never use. Recompile the kernel too and get rid of modules you dont need. For the mp3 player in my car, celly 633 laptop with 192mb of ram..i got it to boot in 7 seconds not including post. 10 seconds including X and xmms starting up.
Either way, bootup times are really a secondary consideration when it comes to improving the computer. AND, if you replaced main storage, you could restore hibernation from it VERY quickly.
It's easier to fight for one's principles than to live up to them.
I like your approach for innovating, rather than slapping parallelism together. However, I think that the multicore cpu is seen as a low risk path to higher performace in a certain tasks.
Multimedia is seen as the application that will drive mainstream consumers to spending more money for processing power. This includes games, video editing and processing... applications that could allow dual cores to run at peak efficiency when they are needed.
My computing runs simulations that depend on past data, it has to be a single threaded. I couldn't benefit from dual cores or SMP... but I think that multimedia companies will make special ports to take advantage of this (especially with the dual G5 systems).
Innovation follows profits... or perceived profits.
ought to be good enough for anyone."
Says you.
You don't define the "max" needed. You define the "min." Special effects studios, researchers, scientists, THEY and many others define the "max" needed and it's never enough. We can always find reasons to need to process more data faster.
If all you need is a word processor then great. But you can't simulate complex weather paterns on a K6-II in anyone's lifetime.
"and my tienda-de-descuentos K6-II still crunches the stuff faster than I could ever desire."
I have a friend who upgraded his system to top of the line and loves it because simulations that used to take days now take hours which means he can do better and more research.
"And prolly there's not too much activity in technologically improving RAM either."
Apparently you missed it when DDR came out and the Dual DDR found on graphics cards that will probably make it's way into PCs eventually to replace the current DDR. And who knows, an even faster memory may be developed before then skipping that stage.
You may be content with old tech but many people could use a speed boost to get their work done faster.
Work Safe Porn
After this be sure to check out Ace's Hardware
.sig: Open Source, Open Mind
They're barking mad, those AMD engineers. They should paws and consider how this will whippet the Intel engineers into shape.
"Someone should come up with XP-like "hybernate" on Linux. "
ALready exists. Saves the whole shebang in swap, when you boot, it finds it reads it directly into RAM.
patience, it will get mainstream quickly, because the need, as you described, is indeed present.
The previous poster mentioned the Banner been written to disk when surfing. That is actually a browser thing. (saving it for next week when you check in on the site again, not having to download it over 54k again.)
But it made me think;
Is there a viable option to plece between RAM and HD. As the difference between the two is likely to persist for quite a while.
I wouldn't mind some solid storage (say 5 gig) as a provider for frequently required data (boot!, office apps, the data your working on at the moment AND your linux/WinXP hybernate file).
Should be something of the same size of a traditional HDD, preferably on the same bus (S-ATA??), should not mind thousands of rewrites (sorry for current flashmem) and CHEAP. (same price as a current HDD).
Would be my christmas present (one of them, i'm spoiled)
Why are other peoples sig's always more witty ???
Heh, what kind of a canine we talking about here? Doberman? PitBull? Akita? English Bulldog?
In some cases free (as in speech and beer) is better than optimal. In this case, free has a higher priority than optimal; optimal can still be had, but for a price. In the case of development of other "free compilers," that cost is time. I'd like to add that GCC has been forked before. The last divergent fork (egcs) evolved into the dominant branch. Nothing prevents people from basing their work on the GCC branch or starting from scratch. Most developers won't invest in a project taking the latter strategy simply because it's unnecessary and will take too long. Which isn't to say that it ought not be done, just that it's not the most efficient solution path.
Don't buy it then, no ones forcing you to. Oh and as for faster memory, Dual Channel DDR and DDR-II are here (or nearly here), both of which improve memory speeds.
----- I refuse to have an argument with an unarmed person
Simply stunning pic!
http://www.theinquirer.net/?article=12145
That's more like it!
"None of this shit works" -W.Shatner
Most comments on this thread will be from people who have no sense what so ever on how MPP SMP or any other processing methood works in real life. So don't listen to them.
And for the same the IA64 uses out of order execution wich is good and bad. We don't know wich but it's diffrent.
Both are a fairly young technologies and have not been utilized to it's fullest extend. But in this I think change is good.
But some old farts will always have some silly DOS pograms running software that no one has been able to replace and such will always be the case.
Why should I change a program which performs perfectly for that speciffic task and write a new buggier version wich has a gui interface and with alot of cost.
Regards Kerling
ps. PL1 COBOL FORTRAN and all that shit ain't dead
You know, just *thinking* of the cooling that kind of thing would need makes me shudder.
It gives me a warm and fuzzy feeling.
Healthcare article at Kuro5hin
I already have it. It was just an example. I want them to play Privateer and Goal! and Syndicate and a lot of other great DOS games too.
People today can see the very first movies ever made on their computer (or their TV), but it takes a lot of work to get an old game to work on a modern computer / OS. It's a bit silly that I can run hundreds of ZX Spectrum games on my system (inside an emulator) but 9 out of 10 DOS games won't work properly unless I boot into DOS (yes, I know about VDMSound, too, but it has its limits). If the hardware changes to the point that DOS won't run, even that is lost.
I guess we can always keep an old Pentium or 486 around for the oldies, but to me that's a bit like having to have a B&W TV (or a film projector) to watch old movies.
Actually, they do both... And quite well.
A dual-method approach really is best, since programs which haven't been used recently can be written to disk, which then frees up more memory for caching hard disk files.
First of all, memory is rather expensive, so getting 320GBs of it really isn't feasable, although getting a 320GB HDD is...
Secondly, you don't need a RAM disk, as any decent OS will cache everything into available memory, so if you have room for that mozilla executable in memory, it will be put there. This has the added advantage of just dropping thoses cached files from memory, when/if you launch a program that needs that extra memory. If you had a ramdisk, that data would HAVE TO stay in physical memory, starving your memory-hungry app for RAM.
Not only is it irrational, it's completely false. All you have to do is change a little setting, and nothing will be cached to your hard drive. I've done this on every computer I've ever setup, for the past several years.
Not true, not true, and not true.
Slashdot gets worse every day... Pipedot: News for nerds, without the corporate slant