Self-wiring Supercomputer

redcone writes "New Scientist is reporting on an experimental supercomputer made from Field Programmable Gate Arrays (FPGA) that can reconfigure itself to tackle different software problems. It is being built by researchers in Scotland. The Edinburgh system will be up to 100 times more energy efficient than a conventional supercomputer of equivalent computing power. The 64-node FPGA machine will also need only as much space as four conventional PCs, while a normal 1 teraflop supercomputer would fill a room. Disclaimer: At this point in time, the software needed to run it, which is the key to the project, is vaporware. "

Comments

Important Question!

[Anonymous Coward]

But will is be able to run Duke Nukem Forever?

Re:Important Question!

[vmcto]

But will is be able to run Duke Nukem Forever?

No. But a spelling / grammar checker might be doable.

Re:Important Question!

[vmcto]

It's called a lunch hour. Try it sometime.

Re:Important Question!

[Anonymous Coward]

No, only for a few hours or so...

Re:Important Question!

[VernonNemitz]

Actually, the REALL Important Question is this:

How easily can that system be modified to emulate any other system? That is, if I have an original copy of the original SpaceWar game, then I need the same kind of computer it ran on, to play it. So, I think it would be REALLY GREAT to be able to have a system that IN HARDWARE can emulate anything from a n old Timex/Sinclair to a Cray.

Re:Important Question!

[Anonymous Coward]

To have a lunch hour, one must first have a job!

Re:Important Question!

[Anonymous Coward]

I thought the real question was:

"How long until Linus is ported to it?" (which seems to be the trend with EVERY new eletronic device ever made these days...)

Re:Important Question!

[Anonymous Coward]

Yes, these days lots of people try to stuff finnish programmers into a variety of electronic devices...

Not new, but a promising avenue

[AKAImBatman]

FWIW, this is not a new idea. FPGAs (i.e. dynamically reconfigurable processors) have been around for about 20 years now, and have allowed hardware developers to produce custom hardware in many situations. The key, you see, is that hardware designed for a specific task is almost always going to perform that task better than a general purpose processor. That's why the SaarCore can outperform a P4, and why your computer has a custom built GPU.

As a result, the idea of runtime-dynamic hardware sounds great. Unfortunately, the issue that developers run into in developing a runtime-dynamic processor is the matter of knowing how to configure the chip. One tack is to allow programs to load chip designs themselves, thus creating specific hardware for that individual program. The down side to this tack is that someone must go through the time consuming task of manually writing the chip in a Hardware Design Language such as VHDL or Verilog. Most programmers aren't going to do this when they can get the program out faster with a general purpose CPU.

This has led to another tack of using software to analyze a program and automatically create a machine to optimize it. This is conceptually similar to the Java JIT method, but is more complex by far. A lot of research is being done into this area (as this story shows), but I wouldn't hold my breath for now.

Another design that makes a lot of sense is the concept of "hardware on demand". i.e. Imagine if you had a library of accelerator chip designs. Whenever a program needs a particular form of common hardware acceleration (e.g. GPU, Sound, DSP, etc.), the onboard FPGAs could be reconfigured to meet the demand. This wouldn't have the same punch as task-specific hardware, but it would provide an inexpensive method for obtaining a bundle of hardware that would otherwise be extremely expensive and use up a lot of bus space.

Re:Not new, but a promising avenue

[Bimo_Dude]

FWIW, this is not a new idea. FPGAs (i.e. dynamically reconfigurable processors) have been around for about 20 years now

You are correct that this is not a new idea; however, I think the original idea for this type of machine was developed in 1936 by Alan Turing.

Re:Not new, but a promising avenue

[pdbaby]

But Microsoft's Xbox 360 has 1 teraflop of processing power! And Sony's Cell processor has 2 teraflops of performance! And they're tiny and cost only a few hundred. Yay microsoft and sony!
</Naive belief in Microsoft and Sony marketing blurb>

Re:Not new, but a promising avenue

[Intron]

Turing machines are not reconfigurable. They perform according to a fixed instruction set. The precursor to general-purpose, reconfigurable hardware is probably computers with microcoded instruction sets, such as the IBM 360 in 1964.

Re:Not new, but a promising avenue

[Anonymous Coward]

And the N64 could push 300 million triangles in its day!

Gotta love marketeers. ;-)

Re:Not new, but a promising avenue

[suitepotato]

Actually, the original idea was either nature or G-d, whichever you'd rather believe in. Your own brain rewires itself over the course of its lifetime, tearing down and building new connections, the neurons actually physically moving their connections about slowly. So, as soon as we catch up with that ability, we'll have one massive new technique in our AI arsenal.

Come to think of it, isn't the software on our brains vaporware until experience has written it?

Re:Not new, but a promising avenue

[modecx]

Indeed, back aroud 1998-2000 we kept hearing about this magical thing from Starbridge systems...

The Hypercomputer--They basically claimed it would be a little cray sitting on your desk that would have the potential to run a bazillon instances of a meta-operating system that would act as a low-level interface for any common operating system, turning a thousand or so FPGAs into a single image system that would be able to dynamically reconfigure it's hardware for the task at hand... And it thoery it would be able to run any binary compiled for any system, if the meta-operating system knew how to translate it.

Of course, that was during the dot-com era, but it did sound facinating, and even promising. Their site is up, and they even claim that NASA and the AirForce are using their hardware/software.

Has anyone out there actually heard of their products being used?

Re:Not new, but a promising avenue

[Jeff DeMaagd]

How does this vapor supercomputing box compare to real hardware, such as a Blue Gene node, which is a big pile of interconnected custom PPC chips, all in a box already the size of a 30" TV?

Re:Not new, but a promising avenue

[pohl]

...isn't the software on our brains vaporware until experience has written it?

Dude, that's poetry.

Re:Not new, but a promising avenue

[Anonymous Coward]

The overhead of a FPGA versus a custom ASIC that does that job is pretty high too... if I remember, something like an order of magnitude slower because of the large overhead necessary to make the the gates programmable. Every couple bits of logic needs another couple bits of logic to control it.

The upside is that it doesn't cost much of anything like it does to fab/test out an asic. Nvidia was able to simulate an entire GPU on an FPGA, granted it ran at a few FPS. And these things won't just be used for random computer use, they'll never replace the athlon/pentium, only as a coprocessor to handly highly structured/repetetive calculations like video /scientific/encoding type tasks.

To this end, an interesting project a couple years back was the GARP project at berkeley, which had a small, FPGA like fabric right on the die with a processor: http://brass.cs.ber/ keley.edu/garp.html

Re: Not new, but a promising avenue

[Alwin Henseler]

I think computers based on reconfigurable hardware (where FPGA-based is one possibility) will be mainstream one day. The potential gains in computing power/energy efficiency are too good to ignore. But to summarise/continue on your comment:

• The technology needed, has been around for quite a while
• It is -relatively- easy to build the hardware
• For mainstream use, you need an easy way to program it for general-purpose computing. The real problem here is software
• The project the article talks about, does NOT offer a solution to this software problem

One tack is to allow programs to load chip designs themselves, thus creating specific hardware for that individual program.

Basically: expose hardware details, let applications control it. That was done in the past, and on simple 80's era homecomputers. Works up to a certain degree, if the hardware is simply enough. As the hardware gets more complex or varied, it's a dead end. For general-purpose computing that is, specialized applications are an exception. This is the reason why operating systems, drivers and software libraries where introduced.

The advantage of these systems is the streamlined, massively parallel computing that you can do with it. Many applications are a perfect match for that (audio/video en-/decoding, 3D graphics, some scientific apps, you name it). IMHO a breakthrough will be, when you have software that makes this 'massively parallel' implicit. So that a programmer need only code relations between data to compute, but NOT how to configure the hardware to do it (=functional programming?). AFAIK, hardware description languages (Verilog, VHDL, ...) or things like Forth are the closest available today. Maybe someone else can elaborate on this?

Re:Not new, but a promising avenue

[darkain]

considering where consumers generally demand performance the most is in games, i can see this as being very helpful. i was just randomly thinking about it after looking at several images on the site you linked at, and then it hit me... if you combine the ray tracing core with a FPGA-like pixel shader, you could get some highly complex scenes with potentially much less overhead and speed requirements... thus making the chips cooler and smaller.

and on a personal note, i would love to see that mixed with augmented reality, with a new VR setup where i can just walk around with it always on. ;)

Re: Not new, but a promising avenue

[Andy_R]

For mainstream use, you need an easy way to program it for general-purpose computing. The real problem here is software

One nice way to use FPGAs is by using the compiler to do the optimisation. Write your software for a large general purpose CPU that could fit in the FPGA, then throw out all the bits of the processor that never get used by your program, and concentrate on the parts you do use.

At it's bluntest, this leads to simple optimisations like dropping the FPU if there's no floating point, or only having the logic to do barrel shifts 2 bits left if that's the only barrel shift your program happens to need, but incorporate a bit of feedback (hey, we only do a multiply once in a blue moon, how about using successive addition and powers of 2 here?) and some odd things (need to refer to 7 different constants? Ok, we build a CPU with 7 opcodes that simply return those values!) and the resulting chip can really fly.

This de-junking concept has great applications in portable devices, the power and cost savings in (for example) a mobile phone that has a CPU specially designed to run the embedded rom software only could be massive.

Re:Not new, but a promising avenue

[spitefulcrow]

Now I just need mod points and a +1 Poetic option.

Re:Not new, but a promising avenue

[SydShamino]

>> The down side to this tack is that someone must go through the time consuming task of manually writing the chip in a Hardware Design Language such as VHDL or Verilog.

That's why there are products such as LabVIEW FPGA. Nothing says that something like that couldn't be done for supercomputing, as it is now done for data acquisition.

Re:Not new, but a promising avenue

[abonin]

At Lakehead University (Software Engineering) we toyed around with doing a similar thing as a degree project. A certain professor there said he also played around with something similar (reprogrammabled FPGA's), but found they become very unstable after many iterations. It could be done but the big draw back is the way verilog/vhdl writes loops. Sure it can optimize some operations, but if a true loop atomic instruction could be devised on-the-fly it would go a long way (maby using NeuralNetworks to find optimal circuits). Its ok though since we ended up doing a port security robot that scanned containers and could be a silent alarm sentry, also it plugged into a national datamining investigation system :)

Re: Not new, but a promising avenue

[rufty_tufty]

This is a passion of mine so I'll try to be brief If you look up transputer you'll see the amazing stuff that was done on parallel langauges; CSP (communicating sequential processes) is old technology. OCCAM being a classic example of an inherantly parallel sequential language. As far as I can tell it never took off as they were a small british company that could never keep up with process technology and so although they had a massive advantage in terms of performance in some respects they lost out because their massivly parallel chips using the last process generation were always in $/MIPS = to your normal microprocessor that was using latest technology. And they tried to be all things to all people. some of the people who worked on this left and formed http://www.celoxica.com/ This now does a c like language that runs on FPGAs. I have seen code written in this Handel C and appart from a few par and ser statements it is c. So we could be there if we embrace it, what all the technology lacks is market and mindset penetration. But I'll stop now before I get carried away... BTW I don't work and never have worked for any of these companies, but I do design ASICs for a living so I do have an interest in seeing/getting things done better.

Re:Not new, but a promising avenue

[Anonymous Coward]

yeah, I remember seeing one of the original "Connection Machines" from Thinking Machines, up close and personal. Quite neat, 64K 1-bit processors in an "n-dimensional hypercube", it took no more than 3 "hops" for a bit to get from any processor to another.

I remember looking at the array of LED's on the side of it and asking "do those show processor usage?", the reply was "they *can*, but totally configurable, we could display the alphabet one letter at a time using any "spare" cpu power.

The advantage, of course, was that you could process, for instance, the stress on an airplane wing across multiple points at the same time. It had a Vax as a "front end" to feed it the info, on some like 1GB/sec bandwidth link (now, for reference, thats still *fast*, although attainable these days, but this was in 1985).

This idea is certainly nothing new.

OK, everybody.

[Scoria]

From this point forward, no Terminator references will be permitted. ;-)

Re:OK, everybody.

[lastchance_000]

How about a Colossus reference, then?

Re:OK, everybody.

[Thud457]

Yeah, but does it run Occam?

Re:OK, everybody.

[Strange Ranger]

From this point forward, no Terminator references will be permitted. ;-)

Ok but... I'll be back.

Re:OK, everybody.

[Spy der Mann]

From this point forward, no Terminator references will be permitted. ;-)

No problemo. B-)

Re:OK, everybody.

[cataclyst]

Ok... just as long as the company has no ties to SkyNet...

Re:OK, everybody.

[Anonymous Coward]

Actually, the manufacturer, "Nallatech", develops COTS Military applications for its FPGA technologies, including those unveiled in the SciAm article.

Re:OK, everybody.

[Anonymous Coward]

So we tell the machine to play itself in tic-tac-toe and eventually it will just decide not to attack.

Being Built

[NETHED]

Well, if its being built, then they MUST have some sort of plan. Its not like we're in the tech bubble again.

it's been done before.

[Anonymous Coward]

Starbridge systems anyone?

some resources

[professorhojo]

the wikipedia article on FPGA: http://en.wikipedia.org/wiki/FPGA

great list of resources from WP on FPGA if anyone's interested in reading more:

• comp.arch.fpga Google archive of Usenet groups, where people interested in FPGA hang out.
• Opencores A set of free IP cores that can be implemented in FPGAs
• Comprehensive tutorial on FPGA
• A comprehensive list of FPGA CPUs
• A good FPGA tools overview
• FPGAworld news, jobs, forums, demos etc.(http://www.fpgaworld.com)
• FPGA Basics by Ray Andraka
• Fpga4Fun various fpga projects
• FPGA Boards
• AP100 PCI Platform FPGA Development Board
• Information about signal processing on FPGA by RF Engines
• FPGA manufacturers
  • Xilinx Xilinx has traditionally been the FPGA leader. Their general philosophy is to provide all the features possible, at the cost of extra complexity.
  • Altera Altera is the second FPGA heavyweight. Their philosophy is to provide the features that most people want while keeping their devices easy to use.
  • Lattice Lattice's focus is on low-cost, feature-optimized FPGAs and non-volatile, flash-based FPGAs.
  • Actel (http://www.actel.com/) and QuickLogic have antifuse (programmable-only-once) products.
  • Cypress
  • Atmel
  • Debian FPGA.

Re:some resources

[zeldor]

plus the computer company
SRC computers
http://www.srccomp.com/
who makes fpga based computers now and their
software development environment isnt vaporware.

Re:some resources

[caluml]

Holy shit! Check out this guys posting history. That's some good posting. I'll give you 10/1 that he'll blow it all in a GNNA trolling session.. :)

Re:some resources

[DoubleD]

Small correction:

Actel also offers Flash based FPGAs (ProASIC+ and ProASIC3) that are reprogrammable.

Re:some resources

[Anonymous Coward]

There's an 'FPGA 101' presentation here for the complete beginner.

(PPT format, sorry)

Eventually.....

[DoraLives]

these things will be a sort of pinkish grey with a funny convoluted surface appearance, weigh a few pounds, and float in tanks of clear liquid.

Re:Eventually.....

[Dr. Weird]

And as a result give consistently unreliable, biased answers for even the simplest of numeric tasks. I love progress.

Re:Eventually.....

[rev_sanchez]

That could be their secret now. They are using women golfers (Female Pro Golfer's Association) to power supercomputers.

At first I thought computer geeks or math geeks would be best but golf requires a great deal of spatial reasoning and since these are women they'd have superior communication skills and that is critical to clustering. I hope they don't try to patent this, their might be prior art to having a cluster of women in a computer.

Re:Eventually.....

[Drakonian]

I think the vast majority of comments are are missing the mark. There seems to be a lack of knowledge about FPGAs. It's not self-aware, and doesn't really configure itself per se. FPGAs are just easily-customizable hardware instead of spending $300k on an ASIC. You "program" the hardware with a Hardware Description Language like VHDL or Verilog. So if you can have custom processing blocks of HDL and dynamically load them onto the FPGAs, I guess it's like "wiring itself". But conceptually it isn't a lot more advanced than say.... dynamically loadable modules. Just that it controls hardware instead of software.

Re:Eventually.....

[inKubus]

...and will then evolve into a shiny plastic black ball with a window that says "My Sources Say Yes"

They must be waiting for...

[Anonymous Coward]

Longhorn to be released.

Re:They must be waiting for...

[dfiguero]

I bet it will use the 64 nodes to tackle _that_ problem ;)

Re:They must be waiting for...

[SnarfQuest]

Which version of Longhorn? The one based on the fancy new file system, and build on .net, or the one they or now planning on releasing?

Maybe they can write the software for it in 100 lb?

Awake me when it becomes self-aware

[Anonymous Coward]

And just before it starts sending people to the past

TU

[Anonymous Coward]

Troll you!

DOH

[1967mustangman]

Now HAL will be able to repogram him self to be even more evil and use less power to boot!!

Re:DOH

[Anonymous Coward]

"Less power to boot." Oh, so punny.

Re:DOH

[wed128]

HAL was not evil...just misguided, that's all.

Mmmmmmm...

[10000000000000000000]

field programmable gatorade...

Re:Mmmmmmm...

[Sensible Clod]

Okay, that's definitely funny.

Colossus, the Forbin Project

[Anonymous Coward]

the idea, like the movie, is right out of the 60's.

I suggest that young people go out and rent this classic movie. It might shock you to find what my generation was talking about long before you were born.

You'll also notice that this movie spawned several others ... what was that one with the WOPR? "War Games"? and of course, "The Terminator."

Re:Colossus, the Forbin Project

[50000BTU_barbecue]

I remember this cool movie from the 60s called Project X. That's another of those "Wow they sure were ahead of their time in the 60s!" experiences.

My only regret is not being alive in the 60s.

Colossus: The Forbin Project

[Anonymous Coward]

First response from new supercomputer was to request all residents of Crete be relocated for some reason.

Re:Colossus: The Forbin Project

[Mhtsos]

I live in Crete, work with FPGAs and still don't get that...

vaporware!

[yodaj007]

This thing runs Duke Nukem Forever! HOW AWESOME!!!

Vaporware OS

[aardwolf64]

I heard that they've got it running on the Duke Nukem Forever OS...

Nup

[Mattygfunk1]

... is vaporware.

It's not vaporware until it doesn't arrive ;)

__
Laugh Daily funny free videos

already on the market

[mjsottile77]

The Cray XD-1 (http://www.cray.com/products/xd1/index.html) has already been on the market with FPGA 'application accelerators'. This isn't really new news.

Besides, FPGAs have two issues that make them good only for a very specific set of apps. Number 1, they don't currently have great floating point performance - this is a killer for most scientific apps. Number 2, they are hard to feed because the rate they can compute at versus the rate memory can feed them is quite skewed. Regardless, they're still very promising. The reconfigurable computing team at LANL (http://rcc.lanl.gov/) has done some very cool things with FPGA based systems.

Re:already on the market

[AKAImBatman]

Number 1, they don't currently have great floating point performance - this is a killer for most scientific apps.

Eh? An FPGA is a blank slate. You can code an FPU into it. Are you referring to the underlying hardware performance being slow for FP calculations?

Number 2, they are hard to feed because the rate they can compute at versus the rate memory can feed them is quite skewed.

This is true of all computers except for custom designed supercomputers. Most general purpose CPUs sit and do nothing for a good portion of the time, while many Crays are designed to stream the memory at 1 cycle == 1 memory retrieval, but can't handle heavy branched logic very vell.

Re:already on the market

[twiddlingbits]

Actually, you have to pick an FPGA "core" that supports an FPU. They are available, but the basic FPGA only supports fixed point math in most cases. And in many cases that is perfectly acceptable. Pipelined CPUs we developed to avoid the wait states for memory so that work can go on while waiting on Memory. Have a on-chip memory contoller which allows being able to access multiple memory locations at the same time also helps with this problem as well as using Dual-Port memory which can be read from/written to at the same time. It doesn't work quite as well as a Cray but its a way to do thing faster when time counts. (embedded systems programmer in a former life)

Re:already on the market

[Kiryat Malachi]

The basic FPGA only supports gate-level operations. When you pick a "core", you're talking about picking an ALU implementation, which really has nothing to do with the on-chip hardware. Some cores implement fixed-point (generally the simpler ones). Some cores implement float. But an FPGA in and of itself implements truth-table operations and block interconnects; it's way below the level of math operations.

(embedded systems designer in a current life, including doing FPGA and ASIC design)

Re:already on the market

[Spluge]

The FPU will be as good as you design it to be.
In comparison to custom built hardware an FPGA sucks, it's big, slow and power hungry. If you were to take a standard FPU and build it into an FPGA it would be useless.
But the whole point is that you don't need a general use FPU that can do everything. You only have one that can do the one specific operation that you need. e.g. If you need to add three 158 bit floating point numbers you have a bit of logic that can do that. It's 158 bits wide, has 3 inputs and one output. Who cares if it only runs at 1/10 of the clock speed of your 64bit cpu, it's still going to be faster.
Getting the system to be able to do that on the fly is the hard part, 99 times out of 100 it's probably quicker to do the work on a standard CPU than to work out how to configure the FPGA. But if you need to do the same operations over and over again then the advantages become huge.

As for the memory bandwidth issue, most large FPGAs include some fairly large amounts of RAM built into them. Certainly enough to do some basic data cacheing and queuing. It doesn't solve the problem but it helps.

Re:already on the market

[AKAImBatman]

Actually, you have to pick an FPGA "core" that supports an FPU. They are available, but the basic FPGA only supports fixed point math in most cases.

Ugh. My poor head is reeling at this confusing statement. Are you trying to say that you need to choose a proper software core with an FPU (I agree) or that FPGAs naturally have a given set of math functions? The former is true, the latter is not. Your FPGA is only as good as the processor core you load into it. If you load a multi-pipelined, FPU capable behemoth, then you'll have all those features available. If you load an "embedded" core that is designed for simplcitiy and fewer logic cells, then you'll have to deal with few features.

Considering how much a Cray costs, I'd think they could splurge for a few Virtexes to load an FPU on.

Re:already on the market

[Anonymous Coward]

The basic FPGA only supports gate-level operations.

Several FPGA families have dedicated multipliers. They're supposedly great for fixed-point signal processing.

Re:already on the market

[Troy Baer]

Considering how much a Cray costs, I'd think they could splurge for a few Virtexes to load an FPU on.

Well, the XD-1 isn't your normal Cray machine; it's the product of a Canadian company called Octiga Bay that Cray bought last year. The XD-1 is basically a blade-based Opteron cluster with a custom InfiniBand interface (renamed "Rapid Array" for inexplicable marketing reasons) and the capability to add a couple FPGAs per blade. It is not a mainframe with vector processors and huge amounts of memory bandwidth, which is what most people think of in relation to Cray.

--Troy

Re:already on the market

[Kirkoff]

It is not a mainframe with vector processors and huge amounts of memory bandwidth, which is what most people think of in relation to Cray.

What about fish?

Re:already on the market

[Kiryat Malachi]

That's a seperate piece of hardware from the base FPGA.

And yes, they are. Since many signal processing apps can be handled quite well in fixed point, those FPGAs aren't half bad. We often just prototype algorithms on DSP and then do the ASIC without bothering with the FPGA intermediary step, but it's nice to have the option.

Re:already on the market

[rufty_tufty]

No an FPGA is a bunch of gates you can build ANY digital circuit with. A CPU, cache unit, a DMA engine, a DSP, a packet processing system, any random state machine - ANY digital circuit. It is more universal than a CPU as I can build a cou in an FPGA, I can only model an FPGA on a cpu.

Re:already on the market

[AKAImBatman]

You just repeated what I said. What is it with people these days?

Re:already on the market

[rufty_tufty]

Late nights, early mornings and double negatives.
I mis-read your post - no excuse I know but that's the whole of it.

Teraflop computer fills a room?

[TinheadNed]

How does the playstation 3 manage 2.2 teraflops without being the size of a house then?

Re:Teraflop computer fills a room?

[BurntNickel]

How does the playstation 3 manage 2.2 teraflops without being the size of a house then?

Marketing.

Re:Teraflop computer fills a room?

[macaulay805]

That reminds me of a quote I heard a long time ago ... "Because there is a translation loss between English and Marketing" ..

Re:Teraflop computer fills a room?

[Anonymous Luddite]

>> Marketing.

Soooooo much cheaper than R&D - who can blame them?

Re:Teraflop computer fills a room?

[csteinle]

Not at the salaries my marketing collegues are on.

Re:Teraflop computer fills a room?

[cyngus]

Because it is only going to achieve this kind of performance for specific circumstances. Specifically when the 8 non-general cores (in marketing Synergistic Processing Elements) can be chained together such that the output of one is the input of another. For something like graphics rendering this makes a lot of sense, since you want to apply a series of effects to a scene. Each core is setup to do one effect and you end up with this really high performance processing stream that's all flowing through fast on-chip memories and buses (once initial data is pulled from main memory).

Re:Teraflop computer fills a room?

[HTL2001]

How does the playstation 3 manage 2.2 teraflops without being the size of a house then?

1.8 of those teraflops are on the GPU

Re:Teraflop computer fills a room?

[ksturgis]

Actual performance of the PS3 and XBOX 360 will be no where near 1 terraflop. I remember when the Neo-Geo 64 came out claiming to be a 64 bit machine because it had 4 16 bit processors inside of it. Gaming companies have always invented metrics to make their machines seem impressive. MS and Sony continue this tradition with there latest generation, throwing out Tflop numbers with recless abandon. The measure MS and SONY are using is the number of dot products their system can do on giberish data in one second x 5 (a vector dot vector is 3 multiplies and two adds). The gibberish data is also never stored anywhere. In any real system you need to get the data from somewhere and put it to use somewhere else. So people who aren't marketing boozos use a standard flop ranking like linpack htttp://www.netlib.org/linpack/ which uses real world math problems to benchmark the performance and has become a standard measure of supercomputer preformance. I predict that if the xbox or ps were ever tested with linpack they would both be around 6 Mflop. I also predict that the xbox would outperform the PS3; mainly because progamming for Sonys cell processor is going to be a pain and getting the data flow right to optimize for a memory intesive benchmark will be a programming nightmare.

Re:Teraflop computer fills a room?

[fbg111]

How does the playstation 3 manage 2.2 teraflops without being the size of a house then?

Marketing.

That would be "Marchitecture".

- Ken Kutaragi.

Nasa did it.

[Anonymous Coward]

Does anyone remember an article about Nasa doing this exact same thing about 5 tears ago.

Re:Nasa did it.

[Anonymous Coward]

Flow my tears, the FPGA-man said.

Skywhatnow

[FidelCatsro]

This sounds like Skynet , a self wiring supercomputer that will go on to dominate the world ..
Please everyone go to the place and dump the thing in some molten metal before its too late... We dont want another awfull Terminator sequal

Re:Skywhatnow

[game kid]

Your ignorance of this previous post would have frightened me if I liked Terminator 3 (I haven't seen it).

Well, as long as this supercomputer doesn't run for Guhvuhnuh of Cullifornia and try to close dee bordahs, it'll be all right. Maybe.

Vaporware?

[Sensible Clod]

Don't worry, just let the machine write its own software.

Starbridge Hypercomputing

[Anonymous Coward]

http://www.starbridgesystems.com/

These guys have been claiming to have this and their software (VIVA) to run it for years. Who knows if it is real... I've certainly never seen one running.

Re:Starbridge Hypercomputing

[kmortelite]

I've seen it in real life. When I was there one of the systems was crunching some genetic info (whatever that means). It's real.

The Viva software is pretty cool too. It's called a formal synthesizer. It takes higher level abstractions and creates FPGA code, optimizing for whatever criteria you ask it to.

It does NOT reprogram itself dynamically (at least as of late 2002). It is merely a tool for creating FPGA code that runs on their hardware.

That Big?

[Anonymous Coward]

"while a normal 1 teraflop supercomputer would fill a room."

I didn't know the XBOX 360 or the PS/3 where that big!!!

Granted it's special purpose.

Obligatory...

[amstrad]

Has it already wired itself to imagine a Beowulf cluster of itself?

Re:Obligatory...

[BurntNickel]

Sounds like the current fortune:

The meta-Turing test counts a thing as intelligent if it seeks to devise and apply Turing tests to objects of its own creation. -- Lew Mammel, Jr.

Re:Obligatory...

[Anonymous Coward]

Done already: http://www.starbridgesystems.com/

At least NASA has bought some of their machines.

Sounds like my current project

[booyah]

I have this killer project going, its all opensource.

its called Duck Nuckem Tournement 2012. its multiplayer, will run on the phantom console, and is all opensource.

ofcourse the project itself is vaporware as of the time of this writing....

Re:Sounds like my current project

[Anonymous Coward]

its called Duck Nuckem Tournement 2012

Good show! According to Laugh Lab, a joke is always funnier if it mentions "ducks".

*ducks*

hypercomputer

[AeiwiMaster]

"No one has ever tried to build a big supercomputer with these chips before," Parsons says.
That is wrong star bridge systems
http://www.starbridgesystems.com/
have been selling the hypercomputer for some years now.

Re:hypercomputer

[Colin Smith]

"No one has ever tried to build a big supercomputer with these chips before,"

HTH

Re:hypercomputer

[Anonymous Coward]

Wow, you remembered that. Thanks for the pointer!

I seem to recall calling bullshit on Starbridge Systems a couple of years ago with their absurd marketing claims. It's hard to believe they are still in business.

Re:hypercomputer

[Anonymous Coward]

Here is the original 1999 article about Star Bridge systems. I can only guess that some other agency was interested in their work.

not really ..

[Anonymous Coward]

... the tools are not ready yet!

the hardware synthesis for a FPGA easily takes 10 minutes (there is a lot of optimization and routing going on)
this step needs to be done for every single configuration you want to use!

reprogramming could be done partially (then the design process is even more complicated) but for one chip it is quite slow (some 100 versions/sec)

the hardware is easily built and I'm sure 64 FPGA can produce quite a high performance - for very few special problems ... this machine will be far from universal in the end :-(

Re:not really ..

[TEMM]

I dont know what kind of design you are referring to but synthesizing and doing routing and placement of a circut takes much longer than 10 minutes for largers system. We have a project in our research lab that takes somewhere around 3 hours to compile from start to finish. That being said, it does not mean that you have to recompile everything when you want to reconfigure a chip. Each chip can have a base set of logic, and have sectors where abstract "modules" can simply be "dropped in". While this can cause a performance hit, it is easy to implement new logic circuts for a device. FPGA's are also really starting to hit their stride and are growing by leaps and bounds.

Re:not really ..

[masklinn]

It should also be noted that specific simulations and calculus can take much more than 3 hours. If you need 3 hours to reconfigure your computer but the calculation is 50% faster than on a general purpose supercomputer, you may still save days.

Not only that, but you won't recompile every time you launch a simulation, since you'll change the datas but not the algorithms themselves when the simulation code is finalized.

An obvious example

[Anonymous Coward]

Architecture does matter. Different problems are solved quicker using different architectures.

For instance, consider the DSP. For certain calculations, a relatively humble DSP will run circles around any Pentium. It is optimised for a certain type of problem. On the other hand, you don't see many DSPs doing CPU duty on desktops.

The early computers were 'programmed' by rewiring them. The then radical idea of a stored program made modern computing possible. We have 50+ years of development on stored program computers. It may take a bit until the idea of programming by 'rewiring' catches up; but that's not because it is an inferior idea.

Turing and so forth

[Jesus 2.0]

It's been a while since I learned about this stuff, but hasn't it been mathematically proven that it's futile to try to write a program that, presented with an arbitrary (expressable) problem, will write a program to solve that problem?

Re:Turing and so forth

[Dr. Weird]

Who said this is an arbitrary problem? It is a very specific one: converting code in some high-level language into hardware wiring.

You're argument would apply equally well (or equally poorly) to compiling code: "since solving the arbitrary problem is futile, we can't convert a high-level set of instructions into machine code" but as before the problem is not arbitrary. The language --> hardware problem is more difficult than the language --> machine instructions, but not unsurmountably and there is much work being done in the area. I would give references, but everything I know is from people who are working on it personally.

Some bits of information

[anzha]

Once the 64-node machine is built, the designers will try to transfer several existing supercomputer programs onto the new hardware using these tools. "If we can get these [programs] to work, we'll know that we have a general purpose solution," Parsons says.

[Emphasis added]

So, this is still vapourware.

LARC, at NASA, built an FPGA supercomputer. Here's a link to a related paper from 2002. Note, its a PDF.

Additionally, Cray builds an FPGA using supecomputer in its XD-1. It's definitely a nonvapourware project since they've sold over 15 of them. Yes, yes, it also uses Opterons, but they're paired with FPGAs.

Additionally, prior to Seymour Cray's death at the hands of a drunk driver, he was looking into FPGAs as his next stab at supercomputing.

Re:Some bits of information

[Anonymous Coward]

You had to go and mention the drunk driver part of the story didn't you?

Additionally, prior to Seymour Cray's death at the hands of a drunk driver.

What are you? Some kind of liberal pussy? Shit happens. Get over it. That drunk driver made a miscalculation. Big deal. Are you gonna stay home and never drive again to protect yourself from drunk drivers? Get real homo. What the fuck does an accident have to do with FPGAs? Nada. Zip. Nothin. Fucking fairy ass. Stupid liberals always whining about how life isn't fair. Way to go stating the obvious. It's not fair and it wasn't meant to be.

Re:Some bits of information

[AndyGasman]

There is a bit of small print with the XD-1s, they don't actually come with the FPGAs fitted as standard, they may have just sold 15 nice Opteron servers.

Re:Some bits of information

[Anonymous Coward]

What are you? Some kind of liberal pussy? Shit happens. Get over it. That drunk driver made a miscalculation. Big deal. Are you gonna stay home and never drive again to protect yourself from drunk drivers? Get real homo. What the fuck does an accident have to do with FPGAs? Nada. Zip. Nothin. Fucking fairy ass. Stupid liberals always whining about how life isn't fair. Way to go stating the obvious. It's not fair and it wasn't meant to be.

Man, you sound drunk.

Re:Some bits of information

[Anonymous Coward]

True, the FPGAs for the XD1 are optional.

Also, the company founded by Seymore Cray that the parent poster mentioned is now called SRC (http://www.srccomp.com/ ). They are currently the world leader in building this type of machine - they actually have a working C & Fortran compiler that will compile code into FPGA gates. And it works. Today. You can also stick with VHDL/Verilog if you desire.

SGI is also working on a system with FPGAs but they don't have a compiler - yet. They have some 3rd party support (Celoxica, and others) and they also support VHDL/Verilog designs.

Re:Some bits of information

[Dr. Cody]

Additionally, prior to Seymour Cray's death at the hands of a drunk driver,

That's not usually how it works... unless the guy gets out of his car and beats you as you lie injured in your wrecked vehicle.

Re:Some bits of information

[Anonymous Coward]

Fuck you. Even if I am a little drunk, what the fuck does it matter. It's a free country man!!! I can be as drunk as I want to be. Nobody said it's illegal to be drunk. But you puss assed pansy faggot libs would be the first to bend over and take it in the ass from the government if they wanted to own you. You're nothing but a bunch of lying whores. Fucking lying whores!!!

Brilliant strategy!

[Pollux]

Here's an idea...I think I'll go into the car manufacturing business. I'll build myself a brand new car with an extremely efficient engine that gets 400 miles to the gallon. It's a small engine and a lightweight car, but can still transport a family of four!

Disclaimer: At this point in time, the software needed to run it, which is the key to the project, is vaporware. "

Except there's one little problem...the gas needed to run it, which is the key to making this engine so efficient, hasn't been invented yet. But as soon as it is, we'll take the market by storm!

Re:Brilliant strategy!

[ta ma de]

Modify your engine to a dual port injection system. On port 1 inject nitric acid. On port 2 inject toulene or glycerin. Your milage might not be 400 to the gallon, however, provided you don't blow-it-up, you car will have more ass than you know what to do with. This would also have the advantage of not needing an outside oxygen source and can run on the moon or underwater.

Re:Brilliant strategy!

[ta ma de]

Kids, don't try this at home -- you will likely not survive. If you do you will be missing limbs. Just thought I should put in a disclaimer/warning. Hence the importance for a mult-port injection if used in an engine.

Me first with the dumb joke!

[Fantastic Lad]

Will it be able to self-repair and come after Captain Blaze and Johnny Lunchpail and the rest of the Good Crew of the S.S. Intrepid with renewed and terrifying mechanical fervor?

Why, Oh why do we build these mad inventions? When will we ever learn the folly of mocking Mother Nature?

-FL

Re:Important Question! (Mod parent +Funny!)

[Anonymous Coward]

Especially because of lame reply to wit. Makes it funny up and down the tree.

welcome

[maduro55]

I, for one, welcome our new self-wiring supercomputing masters.

Re:welcome

[Anonymous Coward]

OVERLORDS you heretic scum...

lies, damn lies and statistics..

[Anonymous Coward]

Firstly, isn't the Xbox 360 1 teraflop? Hardly the size of a room.

Secondly, the FPGA computer has been tried many times before.. StarLabs, NASA, etc. Despite $ millions investment, they have all failed. These guys don't even acknowledge this research, saying their system is "absolutely unique".

Edinburgh University informatics dept. is an odd place to do research. Everyone believes what they are doing is completely different, and when you point at previous research they still insist that other peoples research has no relevance to their brilliant ideas. Witness the Smartdust/Speckled computing farce.

Existing products: Starbridge Systems

[Knightman]

There's a company that has been selling this type of system for a couple of years.

They also have their own language called Viva to be able to program the computer.

Link: http://www.starbridgesystems.com/

Of course

[ftzdomino]

Duke Nukem Forever will only run on vaporware.

Re:Of course

[Anonymous Coward]

Or on Linux, once it is ready for the desktop.

Re:Of course

[maxwell demon]

Duke Nukem Forever will only run on vaporware.

According to the summary, the software of the computer currently is vaporware. Therefore DNF should run just fine on it.

FPGA Computers & Chinese Military

[Anonymous Coward]

England should ban Chinese nationals from participating in research on FPGA computers at Edinburgh University. Beijing has an aggressive program to modernize the Chinese military infrastructure. FPGA computers could figure prominently in it.

Can't refuse...

[genkael]

Could you imagine a Beowolf cluster of ... ah nevermind...

Stretch

[Kontinuum]

As already mentioned, the biggest problem with FPGAs is the difficulty/time in writing the logic. While that's not necessarily a big problem for a major supercomputing center or a CS research center, it (along with cost) is a problem that prevents FPGAs from being routinely adopted by end-users such as people in the applied research community.

One idea to get around this has been advanced by (among others), Stretch, Inc.. The summary is that their compiler analyze your C-code and decide what can be more effectively rewritten as new instructions for their chip, and sets it up on the fly. You never get the ultra-low level control (or performance) of FPGA programming, but in principle you get more performance than before.

Their primary applications have been basically as programmable replacements for DSPs, but they really want to push workstation applications for their products.

That being said, I neither work for them nor have I ever used any of their products, but it certainly sounds interesting!

Coincidence???

[Nom du Keyboard]

Here's my Slashdot fortune cookie for today as I was reading this article:

The meta-Turing test counts a thing as intelligent if it seeks to devise and apply Turing tests to objects of its own creation. -- Lew Mammel, Jr.

Coincidence?

Re:Coincidence???

[WilliamSChips]

The meta-meta-Turing test counts a thing as intelligent if it seeks to devise and apply meta-Turing and meta-meta-Turing tests to objects of its own creation. :P

1 Teraflop supercomputer?

[neomage86]

I'm confused ... I thought the Xbox360 had 1 teraflop, and the ps3 had 2 teraflops of computing power. Now it says a teraflop machine takes a room? From the pictures it seems like the xbox and ps3 are both well under 1 ft^3. Floating point operations/sec isn't like MHz. Higher always means better ... if it can do more operations/sec that by definition means it is faster.

Re:1 Teraflop supercomputer?

[Shadow Wrought]

Now it says a teraflop machine takes a room? From the pictures it seems like the xbox and ps3 are both well under 1 ft^3.

It might turn out that Sony and Microsoft's numbers were more marketing than machine. Remember, its not a lie if you think its true. That's why marketing droids are programmed to be callous, aggressive, and gullible.

MD - Marketing Droid
HE - Hardware Engineer

MD: So how many Terrafowls will it do?
HE: Terra-whats?
MD: You know, how many libraries of congess can it process?
HE: Twenty. No really. Twenty.
MD: How many terrafools is that.
HE: Just one big one...
MD: Right, now I can submit my press release.

Re:1 Teraflop supercomputer?

[Junta]

Game consoles, video chip makers mean something different when they talk flops than HPC community.

Game consoles and video chips operate primarily in single precision (32 bit) mode, hence the high numbers.

HPC generally requires double precision (64-bit) and that is the number used when discussing systems with that application in mind.

Re:1 Teraflop supercomputer?

[AvantLegion]

The majority of the "FLOPS" in the "computing power" numbers for the PS3 and Xbox 360 are GPU shader operations, not general-purpose CPU floating point operations.

The CPUs of each system are both approximately 0.2 TFLOPS.

What about Star Bridge

[Pedrito]

Slashdot ran previous articles on StarBridge Systems and their Hypercomputers that are built on massive parallel FPGA processors. And their operating system/Programming Environment, Viva is not vaporware. I can't find a reference to it, but I'm fairly certain the French department of energy already purchased one for researching nuclear blast yields.

Despite the initial handwaving about having these on our desktops, I think it's going to be a while before that happens. Still, it's a very cool idea.

Sourceforge!

[caluml]

At this point in time, the software needed to run it, which is the key to the project, is vaporware. "

They should start a SourceForge project - we'll all chip in, and send patches and code, won't we campers? Here's my contribution:

#include <stdio.h>

Who's next?

Re:Sourceforge!

[Anonymous Coward]

int main()
{
printf("Hello World!"); //This code will be rewritten on the fly.

return 0;
}

All done!

Re:Sourceforge!

[wpmegee]

#include

Re:Sourceforge!

[wpmegee]

Dammit.

#include <stdio.h>

Re:Sourceforge!

[Anonymous Coward]

/* #include <stdio.h> */
#include "FPGALib.h"

int main( int argc, char* argv[] ) {
DoSomeSmartFPGAStuff();
return 0;
}

Re:Sourceforge!

[Anonymous Coward]

Third times the charm. Should've said stdlib.h

Re:Sourceforge!

[birdman17]

So far we have:

#include <stdio.h>
#include <math.h>
#include <stdlib.h>

That should be it for includes. Here's my bit:

int main(int argc, char **argv)
{

Re:Sourceforge!

[maxwell demon]

Here's my contribution:

dwim();

;-)

To summarise.....

[Anonymous Coward]

....researchers create Vaporware.

Yes, except

[Colin Smith]

It's a research project for Edinburgh University, not a commercial enterprise.

Scotland vs UK

[caluml]

FTFA: The system under construction at the Edinburgh Parallel Computing Centre - part of Edinburgh University, UK - will use Field Programmable Gate Array (FPGA) chips instead of conventional microprocessors.

Has any one noticed that when Scotland do well, we say that they are from the UK/GB. But if they did something bad, it would be "Edinburgh University, Scotland". e.g.:
Coulthard is winning! This British driver is .....
Coulthard has come last, and what a shame it is for this Scottish driver...

Re:Scotland vs UK

[Anonymous Coward]

Yes, I had noticed that Coulthard was largely Scottish.

The trick to this is in the context

[guitaristx]

Consider how much computing resources (for multiprogramming systems) are spent now in context switching. How much more of that would be spent not only dumping and reloading the contents of the registers, like in current systems, but the instruction set architecture (ISA)?

Unless there's some way to dynamically optimize and/or compromise between different running processes (which would inevitably include the OS kernel), this technology has a great potential to be much slower than the usual set-up (this may be a moot point in this particular case, considering that there are 64 different processing units). However, there will need to be some consideration for where the programming of the FPGAs ultimately comes (and how much can be done) from if this technology goes anywhere beyond just supercomputing.

IMNSHO, it should probably be governed with a set-up similar to how operating systems resource management is handled - the kernel has its portion of the ISA that it never allows anyone to mess with (probably not much more than what would make a FPGA as turing-complete as a finite-memory machine could be), and processes, as they have a need for a custom instruction, they will request it from the kernel. However, a process should not block when it fails to acquire a part of the FPGA for its custom instruction(s), it should use a composition of primitive operations (from the set that is kernel-reserved) to perform its operations until the kernel frees up a portion of the ISA to service its request (or until the process finishes).

When you really consider this, it's basically an architecture that allows you to encode subroutines into hardware. The wisest approach (IMO) would be for programmers/compilers to attempt, as much as possible, to use 'library' configurations of the FPGA, so that two or more concurrent processes would have the possibility of at least some overlap between the ISAs of concurrent processes, rather than everybody re-inventing the wheel for every task and making it (essentially) impossible for any processes to share the programmable portion of the FPGA.

Re:The trick to this is in the context

[guitaristx]

...and (since I wrote the parent) I'm hoping that I might get a job offer in Scotland if they think I'm bright enough to make the vapourware into reality.

Re:The trick to this is in the context

[whimdot]

Aha, more hagumemnon than Deep Thought then.

Lisp

[ari_j]

It's only vaporware because they haven't written a Common Lisp for the machine yet. After all, the perfect programming language to target a self-reconfiguring machine is one that can reconfigure itself to keep up with the machine.

humm

[Amouth]

i wonder how buffer overflows will be handeled.. and spawning child proccesses - it could get confusing

Also here

[Anonymous Coward]

more FPGA articles

Buffer overflows

[antispam_ben]

i wonder how buffer overflows will be handeled

If it runs Microsoft software, they won't be.

Re:Buffer overflows

[Amouth]

i was thinking more of when they hook this thing up to something that can build more of it's self.. spawn a child proccess - and get a new computer

Sort of...

[fireboy1919]

What has been proven is that there are problems for which it is impossible to automatically write a program to solve. Further, this is an NP-hard problem, meaning that you can't even know for sure if you're ever going to get a solution, or how long it will take.

However you can usually make a good estimate with approximate solutions of how close you are to the real solution, and how much longer it will take. Obviously this only works with programs that have some form of error evaluation criteria. This is what the field of AI is all about.
There are also some programs that you would immediately be able to identify as solvable with a clear, direct solution, or unsolvable.

Re:Sort of...

[poopdeville]

What has been proven is that there are problems for which it is impossible to automatically write a program to solve. Further, this is an NP-hard problem, meaning that you can't even know for sure if you're ever going to get a solution, or how long it will take.

What on earth are you talking about? You seem to be confusing the notions of recursive decidability, recursive enumerability, and NP-hard problems. I'll sort it out for you:

A set of numbers is recursively enumerable if there is a recursive function of the natural numbers that enumerates (or lists) every element of the set. A set is recursively decidable if both it and its complement are recursively enumerable. A decision problem asks whether or not an arbitrary element is contained in a given set or not. If the set is recursively enumerable, all we can do is wait and hope that the element shows up on the list. There is no upper bound on the amount of time it might take for an element to appear on the list, so there is no way to figure out if a particular element isn't on the list. In short, these things correspond to what you called NP-hard problems. If a set is recursively decidable, we say that its corresponding decision problem is soluble or decidable.

But that's just silly. We say that a problem is NP if it is decidable and can be done in polynomial time in a non-deterministic Turing machine. A problem is NP-hard if it is solvable and at least as hard as NP. A problem is NP-complete if it solvable and no problem is more than a polynomial factor (in terms of time) harder. So an NP-hard problem is at least as hard as an NP problem and possibly as hard as an NP-complete problem. All these classes are soluble. And the hierarchy of classes, of which NP-complete is the maximal class, completely exhausts the list of decidable problems.

Re:Sort of...

[fireboy1919]

Well, I'm glad you sorted that out for yourself. That red herring about recursive enumerability/decidability was a nice touch.
Feel better now?

I stand by my statement. I was "dumbing it down." A problem is normally called NP-hard because it hasn't been proven that it is NP-complete or NP.

There's a heck of a lot of these, and the implications you get from this class of problems are those implications that I gave you. Further, in the real world, decidability isn't a black-and-white sort of thing. A lot of times it's hard to tell if you've actually got the answer. I bet you can guess the only area that you can't know most of the time.

the future

[michael_lacy]

genetic algorithn + FPGAs = evolving computers

Now I can...

[antispam_ben]

Who's next?

#include <math.h>

Now I can sin() without getting all those nasty compiler messages.

Scottish Supercomputer

[Vertdang]

Scottish Supercomputer joke choice awards!

Joke a) Scottish supercomputer: 0 to drunk in 0.000342 seconds!

Joke b) Scottish supercomputer: programmed in baaaa-nary (obligatory scottish+sheep joke)

Joke c) Ahhhch! Me tera is floppin'!

Vote Now! (and yes, I'm part scottish, so I can joke)

Re:Scottish Supercomputer

[coopex]

Heard about the scotsman how drowned in a vat of whiskey? Had to get out twice to piss.

Re:Scottish Supercomputer

[Vertdang]

LOL, that was awesome... I'll have to remember that one in the future.

Yeah, Gödel should have used C#

[theurge14]

He's a rather lazy programmer, always saying it's impossible to finish anything.

Re:Yeah, Gödel should have used C#

[maxwell demon]

No, Goedel was the one who could not make a decision without contradicting himself (very bad when you're at court). The one who couldn't tell if he will ever be finished was Turing. Probably his problem was that he was too busy trying to find out if the people around him actually were transvestites.

Ummm....

[slapout]

.....wasn't that the plot to Superman III?

More improtantly...

[game kid]

...does it learn to run Linux?

Re:More improtantly...

[Anonymous Coward]

Of course, it runs netBSD

cost of FPGA?

[Eugene]

I know it's probably expensive, but does anyone has the exact figure of how much are the FPGA chips cost? like those Xilinx Virtex4-FX?

Re:cost of FPGA?

[wpiman]

They come in many, many sizes- but expect a couple hundred to a couple thousant a piece. Pricing is of course proprietary.

Re:cost of FPGA?

[AKAImBatman]

Avnet publishes *some* prices. Note that large runs are quite a bit less expensive. IIRC, Xilnix claims something like $5 per Spartan chip for runs of more than 250,000. I forget what their claims are for their large Vertex chip runs.

Spartan 3 pricing
Virtex 4 pricing

Hey, there's no reason to cry over it.

[antispam_ben]

"Does anyone remember an article about Nasa doing this exact same thing about 5 tears ago."
^^^^^

Re:

[Anonymous Coward]

Whats scary is that GCHQ and the NSA have had FPGA machines for the past decade and no one knows how/what they're using them for. What the Scotland team are doing might be ground-breaking in the public sector, but in the intelligence world I bet these babies are old news...

Brain building project

[ganhawk]

I came across this sometime ago. This professor claims to build artificial brians using FPGA based hardware. Not sure what the status of the project is now.

Re:Brain building project

[Detritus]

Brian isn't going to like that.

By being flop type dependent.

[Spluge]

They have to be the correct type floating point ops.
i.e. all the same and not involving any data outside the CPU.
If you want that sort of performance no matter what you throw at it then things get a lot more complex.

FPGA's Do Have Some Sweet Advantages

[MyCrowSoft]

Although using FPGAs for reconfigurable computing applications still has a number of drawbacks, utilizing FPGAs for embedded applications is some really cool stuff.

For example, an entire system can be dynamically built right into the FPGA -- including processor, OPB, memory buses, and any other devices such as interrupt controllers, timers, etc. Aside from RAM and Flash, you almost have an entire embedded system built right into a chip.

Earlier this spring I had the opportunity to work on a project that required this very embedded setup. Using the MicroBlaze soft-processor from Xilinx built into the Spartan3 FPGA and only 8MB of SDRAM, I got uCLinux running -- completely tailored to my hardware setup!

I can't tell you how much time and money would have been wasted trying to design and fabricate the same setup on a PCB.

nobody

[cahiha]

"No one has ever tried to build a big supercomputer with these chips before," Parsons says.

Like a serious flu season, this sort of thing happens again every few years, when a new generation of grad students and faculty think it's a really neat idea. The thing is, when all is said and done, these things probably still are not cost effective right now. Sufficiently powerful FPGAs are expensive, and custom hardware is expensive. Furthermore, they are a pain to program, and even if they work perfectly they are good only for a limited set of problems. In the end, you are better off with COTS processors, high-speed links, and clustering.

If we are ever going to move away from Pentium-like processor designs (and I sure hope we will), it's probably via more conservative designs like Itanium and Cell. But even with those designs, it's going to be an uphill battle.

Hype'Computing

[Doc Ruby]

Powerful (by the numbers) hardware, but no software, is the hallmark of general purpose FPGA computing. It was exactly the same story 15 years ago, when I wrote the host/client apps for an embedded FPGA/DSP image coprocessor in Silicon Valley. Still no one has changed the story. The reason is that FPGA is inherently parallel, but all complex application development is procedural. The underlying gates are programmed in Verilog, VHDL, or another hardware state language, which doesn't map well to the procedural model, or its object wrappers.

What is necessary is a dataflow/event language, applying that model from the actual instructions all the way to a topological representation for human programmers. Otherwise, procedural artifacts in one layer or another destroy the parallelism. Interestingly, procedural languages are increasingly simulating parallel processing, with threads/LWPs, multiprocessing, distributed objects. All of which are increasing the demand for dataflow/event design, making dataflow/event diagrams like UML more popular. Project efficiencies and integration demand UML get compiled, and the first real development environments to deliver that approach are arriving.

Meanwhile, other projects (like the MicroBlaze version of uCLinux) actually run real Linux on FPGAs. As people port Linux C source to actual gates, rather than running a sequential processor simulation on the gates for instruction decoding/execution, Linux itself will actually run in parallel. That will be OK along the edges of the OS, in small, close knit projects, but real development will require making the jump to representing the machine in the language itself - a parallel dataflow/event language.

Linux's open source, and its community of independently motivated programmers, makes it the best candidate for a real environment for FPGA application programming. Not to mention the subcommunity of MIPS-mad overclockers, gamers, and Frankensteins. When we finally get a gcc toolchain that can target an FPGA pool, the days of squeezing extra .1GHz from a sequential Pentium will be replaced with slapping another 100K gates chip onto the stack. With its interconnected orthogonal supercomputer modules, it will be "the hypercomputer for the rest of us".

Re:Hype'Computing

[Anonymous Coward]

Wow. Either you're 55 years old and bitter about the demise of dataflow and/or irritated at the lack of adoption of UML, or you're 25 and have no idea what the hell you're talking about.

I see your dataflow software/architecture and raise you a book on queueing theory, which is just about equally useful.

Re:Hype'Computing

[Doc Ruby]

Or I'm somewhere between your age guesses, and have watched both dataflow and FPGA/DSP slowly develop. Where do you get "bitter" and "irritated" from my hopeful post? UML won't get widely adopted until it can generate even prototype code, but then it (or something like it, who cares?) will become popular. And, as I pointed out, almost the only way to program these parallel devices.

Queueing theory is about equally useful, in theoiry, but - where's the software? That's what we're talking about. There's all kinds of books, but where is the actual product momentum, like I described in my post?

I see your snarky insults and your academic theories, and call you on reality.

Hi mum, we're on slashdot :)

[AndyGasman]

Ah, the fame and fortune...

As a software design engineer at Nallatech, I'm pretty chuffed we came up on Slashdot.
Not wanting to come across as a pedant...

"software needed to run it, which is the key to the project, is vapourware"
This is not the case, with Nallatech's software is capable of providing the intercommunication (DIMEtalk), the low level control (FUSE) and the Algorithm implementation (double and single precision floating point cores, as well as a new tool, currently in beta, to simplify their use by developers).

"Nallatech, a company that makes software tools for FPGA programmers".
This is true, however we do equal amount of hardware and firmware development.

More info:
Read our white paper about supercomputing for the oil and gas industry, reg required I'm afraid?
The foot print of this thing could be tiny, as you can get 9 Virtex 2 pro FPGAs (Using BenBLUE-3 modules) on a BenERA Carrier card, and you can get 4 BenERAs into a cPCI rack, so to get 64 FPGAs you just need 2 standard cPCI racks. Since you can get 4 cPCI racks into you standard 19" server rack, which would kick out a massive 2 Teraflops.

Though, I can't help but think Cell processors might kick our asses, at least a little bit anyway. Sorry about all the links to Nallatech, just pointing folk to the info. Oh, by the way, I think the 1 Teraflop for 64 FPGAs is a very conservative estimate.

Current World Computer Chess Champ is FPGAs

[Anonymous Coward]

Hydra http://hydrachess.com/ runs on FPGAs.

Pant, Pant, Pant!

[Hosiah]

I *want* it! I want to over-clock it! I want to run Slackware on it!

So there's no software; ten thousand lines of Lisp code, that sucker *will* wake up and conquor Earth!

Physics processing unit?

[October_30th]

That's why the SaarCore [saarcor.de] can outperform a P4, and why your computer has a custom built GPU.

This is probably off-topic, but I've often wondered if it would be feasible to have a PPU (Physics Processing Unit) to improve the physics of game worlds? I don't know anything about GPUs, but aren't they helping to render the visuals for a game by taking in information such as the coordinates, shapes and texture of objects and then cranking it out faster than a general purpose CPU?

So, in addition to that information, each fundamental unit (again, I don't know the proper term... pixel, voxel, whatever?) from which game objects consist of would have mechanical properties such as density, Young's modulus or bulk modulus as well as forces affecting it. PPU would gobble this up, set up Lagrangian equations (generalized coordinates provide rather a systematic way to set up any classical mechanics problem), crank out the results and update the game world coordinates. This way every object could really be blown to pieces, shot/thrown through objects or deformed.

Re:Physics processing unit?

[Antimatter3009]

Done
http://www.gamecloud.com/article.php?article_id=41

Re:Physics processing unit?

[Dashing Leech]

"I've often wondered if it would be feasible to have a PPU (Physics Processing Unit) to improve the physics of game worlds?"

Yes.

Re:Physics processing unit?

[mangu]

PPU would gobble this up, set up Lagrangian equations (generalized coordinates provide rather a systematic way to set up any classical mechanics problem), crank out the results and update the game world coordinates. This way every object could really be blown to pieces, shot/thrown through objects or deformed.

An interesting idea, it that can be done with current CPUs for lumped elements, but not for continuous media. Algorithms for physics simulations like what you describe have been developed for over 50 years now. Basically there are two types of equations to be solved: ordinary differential equations (ODEs) for objects that can be "lumped", i.e. treated as individual particles, and partial differential equations (PDEs) for continuous media, such as liquids or gases.

In the end, the mathematical operations for solving both ODEs and PDEs become a sequence of multiply-add operations on floating point numbers, and modern CPUs are very efficient for doing these. Both the PPC and the Pentium 4 can do four multiply-add operations per clock cycle, and the Athlon can do two ops per clock. The difference between a normal CPU and a vector processor is that the vector processor can do hundreds or maybe thousands of multiply-add operations per clock.

Solving ODEs isn't very hard, the biggest problem is that most game designers apparently don't know physics. Because the objects one needs to simulate is composed of relatively few elements, the calculations don't need too much CPU power. A car, for instance, is composed of five rigid bodies (a body and four wheels), each of which has a mass and three moments of inertia, plus four linkages from each wheel to the body composed of a spring and damper, and four contact points from the tyres to the ground. Not too complex and well within the reach of current CPUs. One example of a car simulation game with good physics is Grand Prix Legends, so it can be done.

OTOH, solving PDEs is very hard, not because the algorithm is very complicated, but because one has to divide a three dimensional space in millions of voxels and apply the equations to each voxel. Assuming you divide space in a relatively rough resolution of 1000x1000x1000 you would have a billion voxels. To get 30 fps you would need more than 100 gigaflops of CPU, way over the maximum 12 gigaflops that a 3 GHz P4 can do. If one had a vector processor capable of doing, say 1024 ops per clock, rather than 4, it would allow one to calculate the physics of continuous media realistically in games. For instance, imagine a game where one could surf a wave, with a physically correct simulation. Awesome...

But, of course, there are other considerations than CPU power. To handle the billion point in the example above, one would need several gigabytes of memory, and one would also have to move all that data between the CPU, GPU, and memory. My dream system would have a CPU with at least 1024 flops/clock and 20 gigabytes cache memory. Please wake me up when I can have all that for less than $300.

Re:Physics processing unit?

[AKAImBatman]

Most of the game developers I know cheat by using an ODE library. e.g.:

ODE.org
ODEJava.org (Java bindings for ODE)

Re:Physics processing unit?

[petitgars]

"Kim Stowe - Yes. We will have nearly 18 publisher/developer announcements in the coming months. "

I've always wondered what people mean when they say "nearly 18"... Does that mean 17? 16? Or 18, with some wiggle room in case one falls through?

I remember seeing a blurb for some game, saying "up to three different difficulty levels", and I asked the rep "what the hell does that mean?" - his answer? "Search me. I guess we've got three..."

Re:Physics processing unit?

[fitten]

Yeah, a PPU has been in the rags for about 6 months now. Asus is one of the first to support the hardware, several game companies have already pledged support. There were a number of threads here on /. about it.

Re:Physics processing unit?

[mangu]

Most of the game developers I know cheat by using an ODE library

but if you read the documentation, you'll find the following:

"ODE emphasizes speed and stability over physical accuracy"

Which means that ODE, the "Open Dymanics Engine", isn't really very good at solving ODEs, the ordinary differential equations.

Re:Physics processing unit?

[AKAImBatman]

Which means that ODE, the "Open Dymanics Engine", isn't really very good at solving ODEs, the ordinary differential equations.

Actually, that usually means that a library sacrifices precision for speed. i.e. The results will tend to have a much greater floating point drift than scientific libraries. Which means that you shouldn't use such a library for anything other than video games (a place where precision isn't that big of a deal) and other real-time simulations.

Re:Physics processing unit?

[Anonymous Coward]

X have purchased the demo kit, Y have said they are interested in purchasing and are putting together a proposal, Z have requested more information. X+Y+Z = 18. This is a very possible scenario, though it could be slightly different.

For some REAL self-wiring...

[crimson30]

What about the computer from Superman III?

False Information

[module0000]

Where do they get their information that "Modern Systems Operating at 1 teraflop fill an entire room!". Um, *modern* systems operating at up to 147 teraflops, able to be ordered right from cray.com occupy 35.5 in. x 59.75 in. (.9 m x 1.5 m). Those stats taken from: http://www.cray.com/products/x1e/specifications.ht ml I'm real thrilled they feel they have done something important, but why falsely hype it by misrepresenting the existing systems? Perhaps they are referring to NASA's 1970's-era "modern" supercomputers that are undoubtetly still in use and occupying the space of a small house with their PVC-pipe reminiscient conduits.

Re:False Information

[Junta]

Where on that page does that say 147 teraflops?

Around #298 on the top500 list is on the order of a teraflop (a little more and looks like a 256-computer cluster (2-way). That would be a few racks and could be considered small-room sized.

Incidently, #1 on the list acheived ~70 teraflops, so 147 teraflops in 0.9mx1.5m is highly unlikely.

Keep in mind, when throwing around flops when talking HPC, you almost always talk about double-precision (64-bit) and all these game console makers and the like use single precision to get really high sounding numbers.

Re:False Information

[bWareiWare.co.uk]

Theoreticaly that Cray COULD be configuerd for 147TFlops:

18Gf * 8 MSP * 16 Compute Modules * 64 Liquid-cooled Cabinets ~= 147TFlops

But EACH cabinets is 1.3m x 2.6m so 64 would cover 216.32 square meters or a fair sized room!

The nice .9m x 1.5 Air cooled cabinets only top out at about half a teraflop.

18Gf * 8 MSP * 4 Compute Modules = 576GFlops

Self-wiring neural networks using FPGAs

[ikewillis]

Building a supercomputer that runs vaporware seems like a rather foolhardy exercise indeed.

GenoByte has found a more novel use for FPGAs, which they call "evolvable hardware." Much like our own brains neural networks on the FPGAs reconfigure the way they interconnect on the fly; commonly used paths are reenforced while less frequently used ones atrophy.

Here are some cool pictures:

The CAM-BRAIN machine, a big box full of FPGA boards: http://www.genobyte.com/images/machine.jpg

Neural network layout for the XC6216 FPGA: http://www.genobyte.com/images/chip.JPG

All in all this approach is substantially faster than modelling large neural networks on a general purpose processor. In the GenoByte approach, the neural network is implemented as physical circuits.

Re:Self-wiring neural networks using FPGAs

[dbIII]

In the GenoByte approach, the neural network is implemented as physical circuits.

Which is ironic, since I thought the whole idea of a neural network was to replace an analogue computer (opamps and patch cables) with a general purpose digital computer.

Re:Self-wiring neural networks using FPGAs

[80 85 83 83 89 33]

does Genobyte even exist today? i used to follow the camBrain project, but i thought all the funding dried up years ago, and Korkin moved on....

i would love to hear that it is still being developed.

positronic brain?

[infonography]

Is is about time we started working on the Positronic Brain? http://en.wikipedia.org/wiki/Positronic_brain

T oo bad Asimov was sooo wrong about them with regard to the so-called three laws. http://www.asimovonline.com/asimov_FAQ.html

I wonder if you could buy insurance for "rapid positronic cascade failure"

OLD NEWS!!

[radiojock]

back in 1999/2000 starbridge //http://www.starbridgesystems.com/> systems did the same thing, except it wasn't vaporware...

Using FPGA's for ultra fast computing is nothing new. Using them to "test" other chips is standard, it's far easier to write VHDL than do it in silicon first. With the advent are super hi-speed gates numbering in the millions, it's a wonder somebody hadn't come up with a generic reprogrammable cpu for the desktop. maybe they have but places like intel and amd kill innovation like that

Re:OLD NEWS!!

[Anonymous Coward]

No kidding, right? Does anybody even keep up with technology at /. anymore? You guys make freekin' awesome money, and this is the kind of absolute crap you try to pass off as news?!?! And you want me to subscribe to this heaping, festering mound of bovine diarrhea? Geez, this is really old stuff. FPGAs have been around a LONG time, and these buffoons from the U.K. are about 2 decades behind the times. Keep up the good work, you savvy lads! Beyond even that crap, this kind of hardware is uber-easy. The hard part is the software that makes 64 FPGAs look like the hardware platform that the OS was intended to run on. Starbridge Systems calls (or at least used to call, like 5 years ago) their version Viva, and it's quite complex. I'm sure the brits will get that done in another 20 years, about the time NASA develops an inexpensive, reusable, and reliable launch vehicle to replace the current ones. When that happens, I'm sure /. will try to pass it off as new technology news.

Re:OLD NEWS!!

[Memetic]

If you were at the launch event, and have read the project information (www.fhpca.org) NOT just the brief New Scientist article that talks about one of the elements of the project, you would find that the people involved have been doing this stuff for over a decade, and really do get the software issues.

Can it

[Mad Ogre]

Can it find Sarah Connor?

News Flash!

[Hobadee]

San Jose, CA. For immediate release. Hobadee has just created a new super-computer that will be able to solve the answer to life's question in 42 seconds. The computer itself is made out of a chewed piece of bubble-gum and tin foil. Unfortunatly, the software required for it to run has yet to be invented.

Blue Gene is abuot 2.4 Tflops / rack

[a3217055]

Blue Gene is about 2.4 TFlops/ rack ( give or take half a terraflop ) . So room is a small kitchen closet then you have 5 Tflops in there. Most super computers are over engineered to be dynamically configurable, because they are so expensive but then you can add maybe 10% more cost of investment to have something that is even more dynamic. But nowadays you can have a bedroom ( 20ftX20ft ) filled with a rack of bluegenes getting you about 36 Tflops +. Now with newer supercomputers with dual cores and QDR, and all the cool stuff you can most probably have maybe 6 Tflops per rack. And then with faster interconnects you can definately get a a 16% - 25% increase on that number. But those are the next generation supercomputers. What they will provide and do for us is another question, anybody got any ideas.

The end is nigh!

[xenocide2]

It can only be a matter of time now. Although, in all likely hood, it will wind up spending most of its time optimizing Gentoo settings.

A strange loop?

[tondrej]

Somehow it reminds me of GEB.

Precision

[Junta]

Game consoles and video cards are measured by their single-precision floating-point performance (32-bit).

HPC generally requires more precision, and as such the standard for performance measure is double precision (64-bit).

Already got something better

[eagl]

I've already got a piece of hardware that consumes a lot less power and can be reconfigured to solve ANY provably solvable problem. It also unfortunately relies on software "under development".

It's called a PENCIL.

Next week, I plan on holding a press conference when I announce my future-proof technology update, called PAPER. Existing PENCIL software will be fully compatible with PAPER, however document transfer from the previously used TABLETOP and CLAY-TABLET will require third-party software known as a SCRIBE, SECRETARY or the current politically correct term, "EXECUTIVE ASSISTANT".

I only need a few million more before I start production and change the world, so serious investors only please inquire.

IP Addresses [OT]

[birdman17]

Shortage of IPv4 addresses? lynx -dump http://www.iana.org/assignments/ipv4-address-space | grep "IANA - Reserved"

That's a good point. And while we're at it, why are there 16 /8 multicast subnets? And what exactly are Ford, Halliburton, Eli Lilly, Apple, H-P, IBM, and the U.K. Social Security Department doing with their 16 MILLION public, globally allocated IP addresses EACH??? Or what is BBN doing with their 48 MILLION addresses? And then there's BNR, now known as Nortel Networks, which needs fewer and fewer addresses each week. I think a /24 should be plenty for them. (ba-dum ching!)

It looks to the casual observer like there are lots of free addresses, or rather, there WOULD be, with a bit of reorganization and housecleaning...

Already in production

[Anonymous Coward]

Sure, I didn't RTFA. But I'm linking anyway. Starbridge Systems, makers of FPGA computers for a number of years now.

1TFlop does NOT fill a room

[Anonymous Coward]

Not sure where the author got this idea, but you can get 1TFlop easily in a couple racks (see Cray XD1 with dual core opteron CPUs). There are also many commodity systems which can do the same. Also, IIRC, the CRAY X1 with 4 racks would be over a TF.

Obligatory

[PMuse]

"But can you do it?" cried Loonquawl. . . .

"No, . . . But I'll tell you who can," said Deep Thought.

"I speak of none other than the computer that is to come after me," intoned Deep Thought, his voice regaining its accustomed declamatory tones. "A computer whose merest operational parameters I am not worthy to calculate - and yet I will design it for you. . . . And I shall name it also unto you. And it shall be called ... The Earth."

Did Richard Pryor design it?

[elrous0]

Cause, if he did, I don't think we should trust it.

Any computer than can be taken out by a single canister of acid isn't going to be very robust when hit by a virus.

-Eric

Re:Not new, AND being done

[fygment]

First heard about reconfigurable computing here on /. The company Starbridge is still going strong and long past the vaporware stage.

Whither Starbridge?

[jamrock]

Does anyone else remember Starbridge, the self-proclaimed "Hypercomputing Company" and their promise of FPGA-based machines? They were in the news several years ago, but I haven't heard mention of them recently. It seems to me that the huge hurdle in such systems is programming the FPGA's, and Starbridge claims to have developed a graphical programming environment for just such a purpose, called Viva. Can anyone here familiar with them give some insight as to the success of their efforts?

SRC Computers

[lowen]

And this is different from SRC's MAP processors how? Other than the fact that the MAPstation and MAPserver's (running Linux) aren't vapor and have very nice C to HDL compilation tools already bundled. Although they're not cheap.

www.srccomputers.com

singularity

[igotmybfg]

here we come!

You bastard

[Chris Burke]

Here's my contribution:

#include <stdio.h>

You stole my code, you bastard! You'll be hearing from my lawyers.

Score -1 Flamebait

[Anonymous Coward]

stupid thugs always whining about how anyone they don't like is a "liberal pussy". way to go.

I/O and "Attached Supercomputers"

[technobill]

Arrays of FPGAs w/o an operating system fall into a class of either embedded or external "computing accelerators". Having developed applications on a number of these kinds of devices (Pixar Image computer, AT&T pixel machine, IBM PVS, custom built 2048 processor systems and embedded FPGA board-level products), the main problem is I/O. Once data has been loaded, things are great. The rub is loading and unloading the data and/or streaming at DMA rates (in & out simultaneously) all tend to leave the "computing accelerator" significantly underutilized. A lot of attention (and expense) has to be put into the I/O subsystem s to make something truly useful.

Von Neuman Bottleneck

[ka9dgx]

We're all suffering from the Von Neuman bottle-neck. We've all had pipe-dreams of a new, much more efficient way of doing things. I had mine back in 1981-1982, and I call it the BitGrid, your name and specifics may vary, but it's probably also non Von Neuman.

If you can express the algorithms you need in a non-serial form, and get them to operate in a data-flow or other architecture which can operate on all of the data at the same time, you can really kick up your compute performance.

Of course, as long as people stick with the stupid requirement that you must be able to program it in C++ (or Java), you'll never get there.

Really big computing tasks just don't want to get squeezed down to the flow into and back out of a single serial set of instructions. It's that simple.

--Mike--

Re:Von Neuman Bottleneck

[Memetic]

Who says C has to stay serial only?

Ok not PURE, but SystemC & Handel-C are very accessable to most C programmers.

Hey, dems fightin' woids.

[crovira]

I think Smalltalk is a veritable chameleon compared to Lisp. Its the class libraries doan'chyano.

I like Lisp [first program I wrote in Lisp was code that accepted an EBNF syntax and generated a Lisp parser] but not that much.

Re:Hey, dems fightin' woids.

[ari_j]

Can Smalltalk really change a running program the way Lisp can?

Meaningless code snippet:

(defun bob (x y z)
(when (> x y z)
(defun bob (x y z) (+ x y z)))
(* x y z)) => BOB

(bob 4 2 1) => 8
(bob 4 2 1) => 7

How about throwing code around like it's data? (No need for an example since your EBNF-->Lisp program more than likely did this.)

self-wiring -- great new idea

[Anonymous Coward]

A great idea! Now someone should invent a way to store "wiring" and "data" as an electro-magnetic field impulse instead of wire even.

Oh wait. They've done that. It's called software.

Old OLD OLD NEWS

[Anonymous Coward]

Star Bridge Systems did this YEARS ago!!!!!!!!!!! This is not new or news!!!

New tech for old idea

[kcdoodle]

This setup sound suspicously like the Transputer created with wires connecting computational nodes. The language OCCAM has since been ported to other platforms and could serve as a semantic starting point for the programming language to operate this new beast.

Uh oh, it sounds smarter than me!

[bigdog1]

A computer that can rewire itself to solve problems, isn't that how the brain works? Here's an expiriment to test it.

1. Stand in front of a mirror.
2. Snap your fingers (beside your ears) when you turn on the lights a few times.
3. Snap your fingers without turning on the lights, and watch your pupil contract.

Your brain has now rewired itself to solve a problem. Don't worry, it will go back to normal soon.

P.S. Make sure there is a little light in the room to see the pupil contract.

Cray has this now...

[Moses_Gunn]

Some of the Cray supercomputers have onboard FPGA's with custom libraries you can load to solve specific problems. Couple this with your own code and you can get a pretty danged decent speedup.

PS3

[carninja]

The 64-node FPGA machine will also need only as much space as four conventional PCs, while a normal 1 teraflop supercomputer would fill a room
Um, The Playstation 3 is spec'd at 2.2 Teraflops... and it's smaller then a miniATX desktop.

YOU LOSE

Re:PS3

[Guspaz]

Yep, and even the xbox 360 clocks in at 1 teraflop, though that is for CPU + GPU.

Either way, even with regular machines I would imagine that a 3U or 4U blade chassis would have WAY more than a teraflop. And it takes up less than 10% of one rack, not a whole room.

Of course, maybe they meant REALLY small rooms.

Re:PS3

[PipOC]

That statistic is including all the calculations only suitable for specific uses, such as graphics. The graphics alone clock in at nearly 2 terflops.

Re:PS3

[grkvlt]

you are a moron.

Re:PS3

[Guspaz]

Instead of blindly insulting me, perhaps you could back up the insult and grace us with your reasoning as to WHY I am a moron? Do you not feel that a fully loaded blade chassis would break a teraflop?

Problem with FPGA Super Computers

[Anonymous Coward]

Well they are faster if you aren't reprogramming them all the time. IE they are great if you are going to run a similar process over and over again before reprograming but no for a general purpose research cluster that running weather pattern analysis one day and rendering DNA structures the next. You would be wasting too much time reprogramming the FPGA between different applications.

Cooling?

[Anonymous Coward]

I don't think that energy efficiency savings claim takes into account the heat generated and the cooling requirements. Those FPGAs run hot when they are being used. Now multiply by 64.

Re:Cooling?

[Memetic]

Taken the fan off of a Pentium IV recently?

gentoo

[jlebrech]

Can it also install gentoo by itself?

Longhorn and DNF

[empaler]

Actually, Duke Nukem Forever has been slated to ship with Longhorn.
Good news everyone, you'll be playing DNF by this time next year!

Star Bridge Systems

[Repran]

This is pretty old news - I still recall Star Bridge Systems from back in 1997. Don't hold your breath.

VHDL Difficult to program? Bullshit...

[t35t0r]

Who says you need VHDL expertise to be able to program an FPGA? There are lots of C to VHDL converters and here's an open source one. In any case VHDL was created a very long time ago and is even more simple than C or Basic in many aspects.

Eniac II?

[PipOC]

This seems like another Eniac to me. It took 6 days to prep Eniac to perform one single function, by altering connections between the vacuum tubes. Every time these guys have to do something new they'll have to write new code like an Eniac in firmware.

OMGZ SEXY ICON

[Nailer]

Um, I don't know anything about mainframes.

I didn't even read the article.

But the icon looks really pretty and I want whatever it's a picture of.

You know about this stuff. What is it?

GRAPE-DR

[mattr]

The successor to Tokyo University's GRAPE-6 (GRAvity PipE) was recently announced, the 5 year GRAPE-DR program. GRAPE-6 boards contain asics (GRAPE processors) for many body gravity calculations and a few FPGAs (for network I believe). The GRAPE-DR (Data Reservoir) system will apparently also be useable as a general purpose machine and is to get 1 petaflop per node. This is based on 1-2 Tflops per chip each of which integrates 1024 processors. Apparently a 256 node machine is to give 1 petaflop.

Anyway, if you are in Tokyo this week, today and I think tomorrow is open house at the Advanced Research Lab so you could probably see what they have. Today is also linuxworld..

Dave, what are you...

[NuShrike]

doing?

I can't do that Dave...

PPU?

[UberGeekEdward]

isn't that what my nephew says when he does a stinky?