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ARM Offers First Clockless Processor Core
Sam Haine '95 writes "EETimes is reporting that ARM Holdings have developed an asynchronous processor based on the ARM9 core. The ARM996HS is thought to be the world's first commercial clockless processor. ARM announced they were developing the processor back in October 2004, along with an unnamed lead customer, which it appears could be Philips. The processor is especially suitable for automotive, medical and deeply embedded control applications. Although reduced power consumption, due to the lack of clock circuitry, is one benefit the clockless design also produces a low electromagnetic signature because of the diffuse nature of digital transitions within the chip. Because clockless processors consume zero dynamic power when there is no activity, they can significantly extend battery life compared with clocked equivalents."
But does it run Linux?
In English please? Thanks.
Soooo... How many mHz does it run at?
Victory or awesome!
Can a processor like this do things like play sounds? If it doesn't have a clock I don't think it could measure time accurately so it could reproduce the samples. What other drawbacks are there?
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I read the summary and cringed. (1) Don't call them clockless -- they're called a-synchronous, because (unlike a synchronus processor, one with a clock), all the parts of the processor aren't constantly starting and stopping at the same time. A typical synchronus processor can only run at a maximum frequency inversely proportional to the longest length in the critical path - so if it takes up to 5 nanoseconds for information to propagate from one part of the chip to the other, the clock cannot tick any faster than once every 5 nanoseconds. (2) One very serious problem in modern processors is clock skew - if you have one central clock, the parts closest to the clock get the 'tick' signal faster than the parts farhther away, so the processor doesn't run perfectly synchronously.
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--E.C. Stanton
This may create difficulties for software that needs precise timing. Developing PICs I found that timing with the clock speed is easy and important.
Never let your sense of morals prevent you from doing what's right. --Isaac Asimov
Nope. All the pre-Mac Apple machines were based upon the MCS6502 and its derivatives. All were clocked, the original Apple ][ Standard at 1 Mhz. The Apple ///'s selling point was that it had a hardware real time clock, which was removed in later revisions because of quality issues.
The higher the technology, the sharper that two-edged sword.
That's a different clock. THere is the clock which is used to keep time and there is the clock which is used to seperate tasks....
Would this be responsive enough to be used in PDA like applications? or even laptops?
ARM, followd by PowerPC, are the most common cores for embedded Linux and embedded Linux boxes far outnumber servers and desktops (where x86 rule).
Engineering is the art of compromise.
oh wait....
I worked for ARM for four years.
Truely wonderful and very special company for the first two of those years, then it slowly and surely went downhill - these days, it's just another company. ARM's culture didn't manage to survive its rapid growth in those few years from less than two hundred to more than seven hundred.
Many current CPUs don't have built in clocks, but still need them. This architecture is very different. It doesn't need a clock at all. All the timing is based on the propagation delay through the gates. This is extremely difficult to do right.
Maybe the first commercial micro-processor. DECs VAX-8600 was asynchronous. And it smoked for the day. I worked on some of the multi-variant multi-source clock skew calculations for the simulator used to model the processor, among other duties. Very slick hardware for the time. External syncronous contexts are maintained of course for syncronous busses but the internal processor speed is quicker in theory and cheaper power since you have fewer switching transitions. Think of the fun in ECL logic back then. :)
- Tjp
I am in wallow with my inner money grubbing capitalistic pig. ... Oink!
Those were the guys that fought the CORE, right?
"Waste not one watt!" - CZ
Sun exhorts people to make clockless chips
This is my sig.
I think I've heard something like this before. AFAIR Sir Clive Sinclair experimented with something very similar to this 20 years ago? Where did that research go? Was it never put in production?
This seems obvious: laptops! The low power consumption makes them perfect. I'd love a multi-processor ARM9 core laptop running... oh, say, OS/X :-) Just for the geekiness of it.
Helping with organizational effectiveness is our job.
So in short, your next smart clock may as well have a CPU without a clock.
Those damn young'uns and their newfangled clockless clocks.
But your assertion about critical path is slightly off. Asynch processors still have a critical path. If you immagine the components as a bucket-bregade and the data the buckets, then they may not all be heaving the buckets at exactly the same time anymore, but they will still be slowed down by the slowest man in the line. The difference is that critical path is now dynamic. You don't have to time everything to the static, worst-case component on your chip. If you consistenly don't use the slowest components (say, the multiply unit), then you will get a faster IPT (instruction per time) on average.
And yes, you don't have clock skew any more which is nice, but you now have to handshake data back-and-forth across the chip. Of course putting decoupling circuitry in can help.
"You saved 1968." - Ms. Valerie Pringle to the crew of Apollo 8
What's so wrong with "clockless", is there a clock? That would be horrible but you didn't argue that.
Then the summary spends most of its text on the ARM announcement, applications, power consumptions, and electromagnetic signature. For the summary to be 'horrible' these would need to be all dead wrong, but you didn't argue that.
It doesn't seem like you have a point.
Long live digg? I think you mean long live reddit, bitch!
All's true that is mistrusted
Some of us were posting years ago with our palm tungsten c's... I'm sure other devices posted on slashdot even before then.
One of the neatest things about asynch processors is their ability to run in a large range of voltages. You don't have to worry that lowering the voltage will make you miss gate setup timing since the thing just slows down. Increasing voltage increases rise time/propegation and speeds the thing up. The grad students had a great demo where they powered one of their CPUs using a potato with some nails in it (like from elementary school science class.) They called it the 'potato chip'.
"You saved 1968." - Ms. Valerie Pringle to the crew of Apollo 8
It isnt the first, but it will be the most modern..
cool. I want one. Or two...
---- Booth was a patriot ----
They come in 4 models: fast faster fastest OMGspeed I smell gigaflops in common language.
Is there a chance these things will cook themselves?
Current processors are clocked at whatever speed they can safely run at and many of them automatically underclock themselves if they overheat.
Without a clock, what keeps the speed at a safe level?
You missed OMGPonies!!!Speed.
Is it just my observation, or are there way too many stupid people in the world?
"What time is it?" "Shut! The! Fuck! Up! I'm saving energy here!"
Hey I got a link Newer by two days than the article posted. Anyway, at least someone isn't repeating a post. There were Amulet cores which were essentially ARM32 clockless cores much before ARM did make a public announcement. I wouldn't be surprised if the 996HS is a rebranded and reworked Amulet. Amulet was quite well known in Academic circles for at least 3 years. That's my $0.02.
No Greater Friend, No Greater Enemy! (Lucius Cornelius Sulla)
A good survey paper listing other efforts (pdf warning).
And more details of the Manchester Amulet processors. Note that Amulet has ARM core.
Gads. Now that I'm "overqualified" to write software (i.e., employers don't seem to think experience is worth paying any extra for), the geek world has completely forgotten that it even has a history.
Concealed Handgun License Courses in Plano, Texas
Not to belittle the energy savings, but how fast is it compared to a clocked CPU with a similar instruction set? To me, speed the most interesting quality of a new chip design other than reliability. The problem with a clock is that clock speed is dictated by the slowest instruction. Since a clockless CPU does not have to wait for a clock signal to begin processing the next instruction in a sequence, it should be significantly faster than a conventional CPU. Why is this not being touted as the most important feature of this processor?
This seems to be a good overview of clockless chips. I can't vouch for its accuracy (not my area), but the source - IEEE Computer Magazine - should be good. The article was published March 2005.
(warning: PDF)0 18.pdf
http://csdl2.computer.org/comp/mags/co/2005/03/r3
This is extremely difficult to do right.
No kidding. When I took a digital systems lab class, we had to do one simple asynchronous circuit. The corresponding state machine only had four states (compared to a computer processor, which might have a hundred states or more), but it was probably the most difficult circuit to design. Basically, you have to make sure that as you're transitioning between states, you always end up in the correct one, no matter where you may be in between.
If you're not going to have any clock then you can't use dynamic memory. Not a big deal but it's still a lot cheaper than static memory. On the other hand, for a lot of applications, you don't need that much memory.
What did I miss? I remember the hype, the early diagrams of how it was all supposed to weave through without the need for a clock. Would someone care to elaborate on the post-mortem of what was supposed to be the first clockless processor, 4 years ago?
Hasn't the commercial microprocessor industry already been flirting with the idea of asynchronous electronics? Looking at developments like DDR, execution units in processors that accept instructions on both the up and down parts of the clock cycle, and whatnot, it seems as if the idea of strictly obeying a clock signal is becoming a bottleneck. Granted, it's a big jump to actual clock-less operation, but it seems as many of the big players in the processor market have already taken the first baby steps in this direction.
I can't wait to get my hands on one of these and over-asynch the hell out of it. Imagine running it under dry ice - I bet it could run up to 50% more clockless over its default clocklessnes.
I know typing this out will be useless, and it will get overlooked by the mods, but I might as well say this. Asynchronous designs have several advantages :
:). (Yes I know busses are clocked, before you start, but if they were not.... )
1. It will give good power consumption characteristics i.e. low power consumed, not just because of the built in power down mode, but also because of the voltage the chips will be running at. By pulling the voltage lower than a synchronous equivalent, it will be simpler to have greater power savings. This becomes possible if you are willing to sacrifice speed. and in async devices, speed of switching can be dynamically altered as each block will wait till the previous one is done, not until some outside clock has ticked.
2. Security: Async designs give security against side channel power analysis attacks. As all gates must switch (standard async design usually uses a dual rail design, so most gates means all gates along both +ve & -ve switch), differential power attacks become much harder. Thus async designs are perfect for crypto chips (hardware AES anyone?)
3. elegance of solution:the world is generally async. Key presses are, memory accesses are. so why not the processor
But they have several points of disadvantage:
1. They are hard to do. Especially using the synchronous design flow that most of the world uses. Synchronous tools assume, especially in RTL, that the world is combinational, and that sequential bits are simply registers that occur once a clock cycle (not true for full custom designs like intel and amd, but for slightly lower level : esp ASIC design)
2. The tools that exist now, are either able to do good implementation using only a few gates ie small functions or bad implementations, that are in worst case as slow as synchronous equivalents but are larger functions. Tools exist like http://www.lsi.upc.edu/~jordicf/petrify/ Petrify , but these become unusable for circuits with more than ~50 gates.
3. Async designs are usually large. This is not always true, but standard async designs are usually implemented as dual rail or using 1-of-M encoding on the wires. But the main overhead comes from the handshaking circuitry. For really fine grain pipeling, the output of each stage must be acknowledged to the previous stage. This adds a massive overhead, as it necessitates the use of a device called the Muller C Element, that sets the output to the output, only if the inputs are the same, or retains the previous value, if not. Many copies of this element are usually required, and its this that adds space, for example, a simple 1 bit OR gate, that would usually have 4 transistors, has 16 transistors for the dual rail async implementation.
For the time being, I think they will find a lot of use in low power applications - such as embedded microcontrollers/processors, in things like wireless sesnor networks, and security processors. However I believe that full processor design is very far off.
Legally obligatory sig : My opinions are my own... etc etc
is there an x86-compatible version planned? In theory all sounds nice, but unless it has 50% of the market, i doubt it'll be much useful.
So basically, when it was a startup, you enjoyed your nerf tournaments, but then their investors eventually demanded that they make a profit. Was that about the time when you left?
Async work is very annoying when the whole system is one state machine.
Hence, large-scale async work is often based on every data transfer between modules being sent along with a PULSE or READY signal. Of course, every module has to be designed so that its output is ready when it propagates the pulse... otherwise there's bogus output into the next module. Basically, one module having the propagation delay timed incorrectly can kill the whole system. BUT, with fast logic, your system will simply run as fast as the hardware can handle...
Commercial async processors have been around for AGES -- but modern logic IC-based processors are rarely build and sold on a large scale, being mostly experimental designs.
--TheOrangeSquid Is it any wonder things seem so awry? We swim in a sea of confusion and don't have to think to survive
If you're going to nit pick language, you should at least use the standard form of the word: "asynchronous". But this bit of language nazism is particularly lame: "asynchronous" and "clockless", in this context, mean exactly the same thing. "Asynchronous" simply means, "not synchronized". How do you synchronize something? With a clock.
It requires a paged MMU and a port of GCC.
" ARM announced they were developing the processor back in October 2004, along with an unnamed lead customer, which it appears could be Philips. The processor is especially suitable for automotive, medical and deeply embedded control applications."
Lead customer?
Deeply embedded?
Medical applications?
I don't want no lead cpu imbedded in me thank you, theres enough of that poisoning the environment already. At least most cars are running on lead free gasoline.
They come in 4 models: fast faster fastest OMGspeed
I thought they came in Light Speed, Ridiculous Speed and LUDICROUS SPEED!
"Soooo... How many mHz does it run at?"
When talking about number crunching it's infinite Ghz.
When talking about battery life it's 0 hz.
Yeah, but can it tell time?
So how difficult is it to build an asynchronous multi-core processor, if that's even possible? I'm not sure how those ideas fit together.
So, when will Casio be using this processor in a watch? ;)
The Christian Right is Neither (Christian nor right). See: Matthew 23, Matthew 25, Ezekiel 16:48-50
That's why I set my homepage to the most def time site on the internet. http://whattimeisit.com/
I patented screwing your mom. But it got revoked for "prior art."
Man, I haven't heard anything about clockless processors in two decades or more. Fantastic!
-jcr
The only title of honor that a tyrant can grant is "Enemy of the State."
So I take it you can't overclock it? :D
So, they go to Plaid, eh?
$30 Off All Plans: Use code TRIPLESAWBUCK
The 6502 does not have a real time clock. the one included in the III was an EXTERNAL clock chip. Many vendors offered external clock cards for the Apple II line
- Minutus cantorum, minutus balorum, minutus carborata descendum pantorum.
.. a digital watch?
Unfortunately, self-clocked design (like the reported ARM uses) is also sometimes called "asynchronous" logic design; however, this is a completely different kind of thing than the "asynchronous" combinatorial logic used in clock-based design. Self-clocked design also does combinatorial logic in latched stages, but uses a self-timed asynchronous protocol to run the latches instead of a synchronous clock. Basically, the combinatorial logic figures out when it's finished, and tells both the next stage ("data's ready, latch it") and the input latch from the previous stage ("I'm done; gimme some more data").
To close the loop, each stage can wait until there's new data ready at its inputs, and space to put the output data. Thus, in absence of some bottleneck, your chip will simply run as fast as it can.
To overclock a self-timed design, you simply increase the voltage. No need to screw around with clock multipliers; as long as your oxide holds up, your traces don't migrate, and the chip doesn't melt...
The ARM996HS is thought to be the world's first commercial clockless processor.
ALL early micro processors where asynchronous.
And later in the 60s it was a decade long dispute wether asynchronous or synchonous circuits are superior. Granted: synchronous ones are easyer to build, asynchronous ones use less transistors, less power and are in theory faster.
Fact is only: the companies focusing on synchronous circuits where for half a century more successfull in business. But that was VHS as well (beta maxx, anyone?).
angel'o'sphere
Cost free eBook I read (by iBook/Kobo/Amazon/ObookO/Gutenberg etc.): "The Green Odyssey" by Philip Jose Farmer.
The alternative proposed by the research community is GALS - globally asynchronous, locally synchronous. You get some of the benefits of fully-asynchronous designs (e.g. greatly reduced clock skew), while keeping verification complexity low.
The Raven
ARM made a clockless chip in 1994 for cellphones. Couldn't find an amazing reference, but a quick google turned up http://www1.cs.columbia.edu/async/misc/technologyr eview_oct_01_2001.html where they briefly mention it... The last time I heard of this stuff being used was in 2001-- I actually wrote an English paper about it purely to see if I could bore my professor :-p
Your karma may be up with the Funny mods, but with this question the nerd cred sure went low.
The filesystem is the package manager
Try something like Syllable for extra geekitude.
The filesystem is the package manager
It's a regressive step if you look at the speed at which it can push things across. These days, the power consumed is as important an issue. Active research is going on in the area of Globally Asynchronous, Locally Synchronous (GALS, it's called ;) processors, where each module (like, say, the caches, execution units, reservation stations etc.) run their own clock (and hence its synchronous within the module), and communicate between each other using asynchronous protocols (known as delay insensitive protocols). Such a design greatly reduces the need for clock wiring which would greatly reduce area, reduce clock wiring, save power etc. (at the cost of some processing speed, of course). Google for Globally Asynchronous.. if interested.
What about the Speed of Lint?
And what is good, Phaedrus, And what is not good... Need we ask anyone to tell us these things?
I heard it would cost an ARM and a LEG...
For the applications described, why bother when you can put a 6805 micro into sleep that consumes uA and wake it up at any time with an external interrupt?
This isn't a joke but a serious question. What is it's equivalent speed when compared to a traditional "clocked" proscessor?
-1 disagree is not a modifier for a reason. -1 troll, flaimbait, redundant, overrated are NOT acceptable substitutes.
Correct me if I'm wrong, I could be however if I am not mistaken, the early 6502 microprocessor used in Commodore 64 (and in later made VIC-20's) did not have a clock or need one.
;)
.. its now bothering me :D I know commodore made a small MP that did not have a clock core or use anything external. I'm just not sure if it was the 6502.
However I could be mistaken, and info related to the 6502 is a little hard to come by. Plenty of it from hobbyists however not all entirely accurate, and reaching CBM these days to ask is a little difficult
I think they're still in use in positioning devices that point things like satellite dishes and on microwave hops that auto correct their azimuth in really windy areas.
If someone has a commie gathering dust (or better the owner's manual) the exact specs and power consumption should be on the very back page. I wish I still had mine. If you have one, pls reply and let me know if I'm right
sys64738
Between the VCR, Microwave, etc. I changed 16 clocks since we went over to DST.
I will be happy to have CPU without one.
Spoon not. Fork, or fork not. There is no spoon.
I remember this from somewhere. Care to clue me in?
The 6502 has a clock. It might be marked PHI2 on your pinout.
You are right, I finally found this :
Handy PDF giving the 3 clock options for the 6500 series that commodore used. I can't however find a datasheet specifically for the transitional 6502 they used when going from the VIC-20 over to the first Commodore 64 which was the one I was thinking about.
However if the prior, and latter models used an external or on chip clock, I'd imagine so does the one I was thinking of.
I remember reading about a clockless MP they were putting into production and I can't remember the name of it. This is going to bother me.
It's from Spaceballs.
I want to see them harness the same kind of power regeneration hybrid cars use to recapture power when braking. When the voltage square wave goes down, maybe charge a nanoflywheel to discharge when sending the voltage back up again.
--
make install -not war
AHA! Found it. It was the 65CE02 which had an on chip clock which you could send a trigger to stop, causing the MP to go into a suspended but wake-able state (and from 5v to 1.5v consumption). When the clock resumed via external trigger, so did the MP without having to go through its full start up cycle. They never did much with it oddly.
/. for?
:) Hey I'm amazed I even remembered it :P
When I read the article what popped into mind was low consumption while doing nothing, which is what made me think of it. So now I've shown my age and made quite the ass of myself, but what else is
So not the same thing. Sorry for the ruccus
Well, Dark Helmet is Canadian.
you forgot 'kaplad speed'
joke's over, we're past april 8th. thanks for trying.
Most digital logic has at least one repeating signal called a clock, which is used to sequence the logical changes (e.g. from 1 to 0) in the circuit. By limiting changes of state to a periodic time, you can simplify a digital design. One of the major challenges in digital design (besides errors in logic) is dealing with timing related issues such as race conditions. Race conditions occur when a logical operation uses the results of earlier operations. Because of the finite speed of signals inside a chip, sometimes a signal arrives too late for a proper operation to occur. Such an error considered to be a race condition.
Clocks help by allowing the designer to effectively freeze the state of the logical circuit on a regular basis. This way, all the signals in a chip can propagate to where they are supposed to go, then the logical operations occur. This process repeats on every clock pulse.
The problems with using clocks are pretty significant, however. First, you need to add a lot of additional circuitry to implement a clock. Another problem is that generally, A LOT of changes happen on every clock tick, which means a large spike in electical current (because you need to use the electrical current to actually change the state of all of the digital circuits). This spike also causes what is known as noise in electronics, and with higher frequency circuits, the noise can actually cause interference with other unconnected electronics (this is known as EMI). And another problem with a clock is that you generally need to keep it running all of the time for it to be useful, which means using electrical power even when no changes are occurring.
So, the asynchronous CPU is a significant engineering feat. It is very difficult to design, but it is probably much smaller and more efficient than any equivalent clocked ARM core. That said, I wonder how do you actually evaluate the performance? With synchronous CPUs, it is a simply a function of the clock speed and architecture. In addition, all of these devices need to be tested so that they are guaranteed to work - I wonder how they do that.
No, I don't trust in god. He'll have to pay up front, like everybody else.
There's no easy answer. On a traditional clocked processor, each instruction takes a certain number of clock cycles. In the async case, everything just takes however long it takes. In fact, some arithmetic operations might take variable amounts of time depending on the value of the operands.
Given an equivalent process, layout technology, and number of transistors, an async design will be at least somewhat faster and vastly more power-efficient than a clocked design.
But none of those things are going to be equivalent in the real world - except possibly the process that ARM designs to. So comparisons will be difficult.
You know, I had recently myself been looking for a "Workhorse" system to fulfill some fairly persistent if mundane encoding needs, but I shall have to consider the possibility of an OMGPonies!!! alternative in light of this article and the above post.
Karma: Chameleon (comes and goes)
I don't think you are correct when you talk about different grades of silicon. For the most part, the magic is in the processing to the silicon wafer. They all start off pretty damn pure. Things that matter are the orientation of the crystal, and the actual size of the wafer. But I don't work in a Fab, so I could be off base.
No, I don't trust in god. He'll have to pay up front, like everybody else.
In English please? Thanks.
Dear Poseur nerd;
Your Slashdot post has been audited by a nerd committee and has been found to be lacking in both quality and substance. Normally this would only result in downward moderation. However, in this instance it grossly lacks nerdly appreciation of the subject matter presented, indicating that you are not a true nerd. If you were a true nerd, you would have instead made a post about where one of the said clockless processors might be obtained, or maybe indicate how it might be useful for an linux ogg player, which you have failed to do. You also probably have a girlfriend and have your own place.
Therefore we hereby revoke your standing as a nerd, and must ask that you turn in your nerd card at the door as you leave the premises.
Sincerely,
the Slashdot phony nerd patroll
Take the cheese to sickbay, the doctor should see it as soon as possible - B'Elanna Torres, "Learning Curve"
Not faster - sooner. The closer they are the sooner they see the clock pulse.
so the processor doesn't run perfectly synchronously.
The processor does indeed run perfectly synchronously. The individual logic gates just produce results at different relative times. This has always been the case, but as clock speeds increase, the relative size of these delays becomes a bigger issue as the inputs to and outputs of logic gates clocked at different relative times have to be combined. Momemtary unexpected results (glitches) can occur if these effects are not controlled.
Sun was indeed talking about it, but they never made something for real unlike Arm/Philips. Sun only did some simulations.
Back in the 90's when I was working at a university a student did his phd work on clockless chips. He said it could not be done. How wrong he was!
Even you do more research you will find much more work. But this Arm core is the first working micro processor silicon you will find.
So, future chips won't be measured in MHz but in volts. "I got the new AMD Gimcrack one-petavolt". And chip failures won't result in quiet sizzles, but a room-shaking blast of arcing...
The original 6502 had dynamic register storage (using capacitors, similar to dynamic RAM) that would lose information if the clock was held off for very long. So the CPU clock had to be run at a certain minimum frequency (a few hundred kilohertz IIRC) and though it could be stopped briefly, more than a few microseconds would cause the CPU to crash hard.
What about TicS ?
The 166 CPU of the PDP-6 was asyncronous back in 1964. This predates the Venus, 8600, and even the PDP-8 mentioned by others.
Digital had it then...
Intel would have no clue how to market it.
ARM is actually building this chip with Handshake Solutions, a Philips incubator. The work stems from Philips Research as early as in 1986 (yes that's 20 years from research to product), and has matured very much over the years. We used to have courses at our university explaining the basics behind these asynchronous designs. All in all I'm excited to see this technology finally in a product, and hope it will make my pda last yet a little bit longer.
Well, clocked CPUs also don't need to consume power when there's nothing to do. Smaller or larger parts of the core can be deactivated when the inputs allow this. The same is true for an asynchronous core.
Also, I presume than even async cores need an external clock to communicate with off-chip entities, say, memory. So in the end the async core only has bigger areas that are timed *exactly*, while clocked cores have a clock that activates the big blocks in the core in time.
I also think that clocked cores are more flexible, when you over- or underclock them or change the voltage, because async transistor timing sure has to be very sensitive to stuff like that...
Of course the ideal CPU would combine both mechanisms, clock certains parts of the core, turn certain parts off when they aren't needed, and clock certain areas "in reverse", to reduce radiation and energy intake in a given moment (i.e. spread transistor switching so it happens on more than one single moment).
this would be great for the new sony eink ebook, I think.
i cant see the damned topic for the xerox advert =[
I Predict A Riot
MIPS/Watt ... like they do ALREADY!!!
Mod parent down as "I've never been to arm.com so I'm a big dummy."
Tom
Someday, I'll have a real sig.
Here.
Lars T.
To the guy who modded me down from perfect to terrible Karma - Apple haters still suck
This would be great for solar powered applications or processing driven by human body processes, ie: where the voltage won't always be consistent, yet the processor can still function consistently even if not at the same speed... it will continue computing effectively and accurately regardless of it's energy supply without the need for a large (relative to use) battery or capacitor....
I'm thinking of apps like micro cpus for embedded implants or for environmental sensors running on solar power
If nothing else an added benefit would be that they can continue operating at lower speeds while the power supply is running out, slow down operations in synch with amount of battery power left
A fool throws a stone into a well and a thousand sages can not remove it.
It's NetBSD that requires gcc and a paged MMU.
Linux is more portable. Linux runs on the original 68000. Linux was just ported to the Blackfin DSP. There seem to be about a dozen crappy little no-MMU processors that can run Linux.
Linux requires a gcc-like compiler, but not necessarily gcc. IBM and Intel have both produced non-gcc compilers that are able to compile Linux.
I didn't say it did ... I said the Apple /// offered one. And the reason that it was removed is because they never got the part to work properly. I owned a Thunderware Thunderclock board for my Apple ][ machines. Worked very well, I probably still have it in a box somewhere.
The higher the technology, the sharper that two-edged sword.
A clock is a timer, as measured in Hz (oscellations per second). Generally the actions within each device, such as your processor or video card, operate on their own clock (this is the GHz number), while devices communicate with each other using the bus at the speed of the bus (more distance, mismatched components, and possibility for interference causes slower speeds, closer to 800MHz-1GHz these days).
Essentially (as an example), when a processor wants to copy something from a register to memory, it puts a signal on a control bus to tell the memory controller to charge a specific address of memory. The memory controller is reading this, and starts the action, knowing that it takes a fixed number of clock cycles to do this (think the timings of memory). After that time has passed, the processor routes the data in question to the bus. So the signal is being produced, the memory controller has it attached to the memory and charged properly, and the processor keeps it there long enough to write to the memory. That signal needs to be there as long as the memory is attached and set to write.
Now- imagine this type of situation (which applies to all devices, and within the processor's internal actions) should the timing be slightly off between all devices. Not very effective is it? The memory controller may still be reading while the processor stops writing, leading to corrupt data. Essentially, it syncs up the talking, listening, and computing.
This is true within each device as well, such as making sure that all elements of a function are performed at the same time and you don't end up with half of your answer after you actually need it.
Aync means that there's no clock, but rather, the timing of it is established before communication, using a few control signals and regularly adjusting accordingly.
-M
when you see the word 'Linux', drink!
Did you mean OS X (Apple) or OS/2 (IBM)?
Timing is everything. So, you could do it but at the cost of extra complexity not to mention power consumption. My guess is that you would quickly start to give away the advantages that you got by going clockless in the first place.
Anyway, using something that inherently has to be clocked begins to sound like a kludge.
Actually, the power consumption might be the biggie. If you are doing a power budget for your computer, you allot about ten watts for each memory stick. There is a minimum refresh rate for dynamic memory and therefore a minimum power consumption. So, if your processor was running dead slow to save power, your memory would still be eating electricity.
There was "TA: Kingdoms," which Cavedog made after the first TA, and which I loved.
Unfortunately, Kingdoms never caught on. There were a few reasons for that. When it was released, the hardware requirements were obscene. I was lucky in that I'd just gotten a new computer, and, for the time, it was a beast: PIII 550, 256 MB RAM, TNT2 -- it cost $3k back in the day, and it's still plenty fast enough for everything my family does, six years later. Most people who tried to run the game, unlike me, saw a slideshow in the late game when there were tons of units. That doesn't make for an enjoyable gameplay experience, so, naturally, other people who weren't lucky enough to have top-of-the-line hardware didn't like the game.
Although I didn't realize it at the time because the game ran perfectly for me, TA:K was also rather buggy. That same PIII 550, now running XP instead of 98FE, and now with new drivers for everything, doesn't play the game right anymore. Choppy, garbled sound; graphical anomalies; incorrectly-rendered text. If that's how the game had looked when I first started to play it, I'd have quickly lost interest. For some people, that's how it always looked.
But plenty of games come out that need tons of patches, and plenty of games come out that need to wait for the hardware to catch up. So what really killed TA:K was that support dried up for it. It was the day Cavedog died.
Cavedog went under when a few key developers left for competing companies. Cavedog got bought out by something inappropriate -- Hasbro, or Brady Games, I think -- and, though there were rumors of a Total Annihilation 3, which was to be the sci-fi sequal to Original TA, it never panned out.
Cavedog is dead. Bungie is in chains. Blizzard ran off with an MMORPG. Who will rise up to take their place?
Reality Pump? Earth 2150 was wonderfully ambitious (and is still a favorite; it has naval units, aircraft, customizable units... even underground tunnels!), and 2160 is the most creative RTS I've seen in a while (nevermind the so-bad-it-makes-you-cringe voice-acting and single-player campaign). What other developers are carrying the torch and pushing forward the genre?
Well, there's the Open Source community. TA:Spring is incredible. It's unpolished, but quite pretty on good hardware (or so I am led to believe by screenshots; I've only got a Dell laptop), and the engine is undergoing constant refinement. Right now it's mainly a nostalgic ode to a past classic, but mods do add new gameplay types and units. Will TA:Spring ever become a great classic in its own right?
This chip is a CPU. It consumes almost no power when idle. Most of the time my CPU is idle, but there are other components in my computer that should be idle even more, like my sound card, the 3d component of my video card, etc. Could a clockless chip be used in these applications as well?
Man, I actually read "Cockless Professor" instead of "Clockless Processor". Time to get some sleep.
The only timing assumption that had to be made was "isochronous forks" i.e. that if two gates saw the same input (i.e. were tied with the same wire from a common output) then they both 'see' the input before their outputs can have any effect on the other gate with the same input. So for example if a transition to a '1' at an OR gate input simultaneously causes some other gate to set the OR's second input from '1' to '0', there would be no glitches. The prof proved that this assumption is needed to do any usefull calculations. Wire speed .lt. gate speed is an easy condition to meet for most technologies.
So then as long as the design is segmented into lots of small, verifiable components, you can define a safe, 4-phase handshake that has no race conditions between blocks so the whole design is safe. You still have to check for deadlock conditions. The drawback is that to do the handshaking you have to use two wires per bit, which essentialy doubles your transistor count. "00" = no data, "01" = 0, "10" = 1, "11" can't happen. This gets arround the problem of a fast "valid" flag arriving before slow data is metastable.
"You saved 1968." - Ms. Valerie Pringle to the crew of Apollo 8
And the PDP-7 before it, though it had a variable delay line, adjustable from the front panel. Playing music (using bit operations on the accumulator, hooked to the amplifier) was interesting, as you had to tune the CPU by adjusting the clock!
toresbe
Just curious... Your last name isn't Licklider, is it?
toresbe
Uh, ignore me, he died 16 years ago :(
toresbe
Nintendo has used the arm in 2 of there consoles. I am pretty sure it wa sused in the gameboy advance3 and 2 arm processors in the Nintendo DS. So why can't this new processor be for there new rumoured Gameboy Evolution?
No, in my case JCR stands for John Charles Randolph.
-jcr
The only title of honor that a tyrant can grant is "Enemy of the State."
Philips was thinking about this back in '90. (As in guys in the lab assigned to the project, results in a year, maybe two).
Phew. Finally....
http://www.arm.com/products/CPUs/ARM996HS.html
...
and, since I'm posting,
The ARM996HSTM processor is the industry's first
licensable clockless processor and
"licensable"
A huge number of Y2K problems came about because computers had clocks. Just about every computer made before the year 2000 had a clock. This processor is clockless, and as a result can no longer suffer Y2K style problems. Now the quick and sharp tounged reader will be quick to yelp "But they mean oscillator, a crystal fed to a j-k flip flop which is used as a reference signal to the CPU and to main memory (and a lot of other circuitry). To which I reply: the Y2K yelpers never mentioned oscillator when they screamed that we are all going to die and the world is going to Hades in a handcart. That was a small detail they were cheerful to omit (leading to yet greater obfuscation). Sales of computers increased in 1999 as a result, as did their commissions. Why tell the truth when you get to go to Hawaii if you don't?
think the AMULET (out of Manchester University ?) was an earlier asynchronous chip
THe idea of clockless sections on a clocked chip has relatively little benefits over a completely clocked chip. Since the result of the onclocked operation needs to be picked up by a (globally) synchronoized part later, that part will either use
- (worst case) the unclocked part's worst-case timing, or
- (best case) throw away some possible intra-clock-cycle benefit.
Therefor only benefit will be frequency spread and the module not being dependent on freq. skew.
For "clockless" to thrive, the complete chip should be clockless.
If you have a look at the Wiki entry, or some of the posts here, you'll notice the overall speed of the chip is entirely dictated by voltage.
Although current chips are clocked (partly dictated by voltage as well) to manage heat, this heat is actually caused by each of the operation circuits in a chip having current pass through it, then, on the next cycle, having that occur again.
This case is no different - heat is caused for the exact same reason, and at a given voltage, the maximum amount that a given circuit could be used is constant - for example, the ADD op might be the fastest and could survive 10million ops per second, so you set the voltage for that speed, and all goes to plan.
It is notable though that many clocked chips do a lot of useless ops (creating heat) and throw the results away, for cheaper flow and design. A clockless chip like this will save a great deal on heat in this regard, because by design it has to only use the ops it actually needs (or the process will break down). Further, the clock circuitry itself adds a lot of heat that this design avoids. It's possible the speed of some operations, especially smaller ones like ADD, could dwarf the maximum speed obtainable by say, an Intel chip, at the same heat levels.
Here the idea of the thread is
a metaphor for space-time.
What if the colapse of the wave function is
a handshake operation to work around the larger
non-existance of a global clock in
relativistic space-time.
Thought for the day.